| dbo:description
|
- architecture et jeu d'instruction pour microprocesseur open source (fr)
- Arquitectura de CPU basada en el Conjunto de Instrucciones Reducido cuya licencia es de código abierto (es)
- RISC-V (ca)
- مجموعه دستور العمل متن باز برای پردازنده کامپیوتر (fa)
- malfermitfonta instrukciara arkitekturo (eo)
- offene Befehlssatzarchitektur (de)
- opensource instructiesetarchitectuur (nl)
- Открытая процессорная микроархитектура (ru)
- סט פקודות למעבד בקוד פתוח (iw)
- 开源指令集架构 (zh)
- open-source CPU hardware instruction set architecture (en)
- standard aperto di un insieme di istruzioni per CPU (it)
- otevřena instrukční sada a architektura procesoru (cs)
|
| dbo:thumbnail
| |
| dbo:wikiPageExternalLink
| |
| dbo:wikiPageWikiLink
| |
| dbp:at
|
- Section 2.5 (en)
- Section 2.9 (en)
- Section 5.4 (en)
|
| dbp:bits
| |
| dbp:branching
| |
| dbp:date
| |
| dbp:design
| |
| dbp:designer
| |
| dbp:encoding
| |
| dbp:endianness
| |
| dbp:extensions
|
- (en)
- A: Atomics – LR/SC & fetch-and-op (en)
- B: Bit manipulation (en)
- C: Compressed instructions (en)
- D: Double (en)
- F: Floating point (en)
- J: Interpreted or JIT-compiled language support (en)
- M: Multiplication (en)
- Q: Quad (en)
- V: Vector Operations (en)
- Zicsr: Control and status register support (en)
- Zifencei: Load/store fence (en)
|
| dbp:fpr
| |
| dbp:gpr
|
- 16 (xsd:integer)
- 32 (xsd:integer)
|
| dbp:introduced
| |
| dbp:name
| |
| dbp:open
| |
| dbp:pageSize
| |
| dbp:pages
|
- 20 (xsd:integer)
- 28 (xsd:integer)
- 38 (xsd:integer)
|
| dbp:reason
|
- "Middleware" is a broad term; what sort of middleware requires significant work to handle a new instruction set? (en)
|
| dbp:type
| |
| dbp:version
|
- (en)
- privileged ISA 20250508 (en)
- unprivileged ISA 20250508, (en)
|
| dbp:vpr
| |
| dbp:wikiPageUsesTemplate
| |
| dct:subject
| |
| gold:hypernym
| |
| rdfs:label
|
- RISC-V (en)
- RISC-V (ca)
- ريسك فايف (ar)
- RISC-V (cs)
- RISC-V (es)
- RISC-V (eu)
- RISC-V (de)
- RISC-V (fr)
- RISC-V (it)
- RISC-V (ja)
- RISC-V (ko)
- RISC-V (pl)
- RISC-V (pt)
- RISC-V (nl)
- RISC-V (ru)
- RISC-V (uk)
- RISC-V (sv)
- RISC-V (zh)
|
| owl:sameAs
| |
| prov:wasDerivedFrom
| |
| foaf:depiction
| |
| foaf:isPrimaryTopicOf
| |
| is dbo:computingPlatform
of | |
| is dbo:wikiPageDisambiguates
of | |
| is dbo:wikiPageRedirects
of | |
| is dbo:wikiPageWikiLink
of | |
| is dbp:arch
of | |
| is dbp:cpu
of | |
| is dbp:platform
of | |
| is dbp:platforms
of | |
| is dbp:supportedPlatforms
of | |
| is foaf:primaryTopic
of | |
