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The Constructing Hardware in a Scala Embedded Language (Chisel)is an open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level. Chisel is based on Scala as an embedded domain-specific language (DSL). Chisel inherits the object-oriented and functional programming aspects of Scala for describing digital hardware. Using Scala as a basis allows describing circuit generators. High quality, free access documentation exists in several languages.

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  • The Constructing Hardware in a Scala Embedded Language (Chisel)is an open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level. Chisel is based on Scala as an embedded domain-specific language (DSL). Chisel inherits the object-oriented and functional programming aspects of Scala for describing digital hardware. Using Scala as a basis allows describing circuit generators. High quality, free access documentation exists in several languages. Circuits described in Chisel can be converted to a description in Verilog for synthesis and simulation. (en)
  • Chisel est un langage informatique open-source de description matériel basé sur Scala. Chisel, pour Constructing Hardware in Scala Embedded Language, permet de décrire des circuits électroniques numériques au niveau du transfert de registres (RTL). Chisel hérite des propriétés objet et fonctionnel de Scala pour décrire du matériel. L'utilisation de Scala comme base permet de se servir de Chisel comme un générateur de circuits électroniques. Il existe également TL-Chisel, l'équivalent en Chisel de TL-Verilog (Transaction-Level Verilog). Les circuits décrits en Chisel sont directement convertibles en Verilog pour la synthèse et la simulation. Exemple Un exemple simple de circuit additionneur. class Add extends Module { val io = IO(new Bundle { val a = Input(UInt(8.W)) val b = Input(UInt(8.W)) val y = Output(UInt(8.W)) }) io.y := io.a + io.b} (fr)
  • Chiselは、デジタル回路設計用の、オープンソースのハードウェア記述言語 (HDL: Hardware Description Language) の一種である。カリフォルニア大学バークレー校で開発が行われている。Chiselは、Scalaの内部DSLとして実装されている。 (ja)
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  • 2022-07-30 (xsd:date)
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  • 3.5.4
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  • 64171233 (xsd:integer)
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  • 7433 (xsd:nonNegativeInteger)
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  • 1111334231 (xsd:integer)
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  • September 2022 (en)
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  • 2022-07-30 (xsd:date)
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  • 3.500000 (xsd:double)
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  • ChiselLogo.svg (en)
dbp:name
  • Constructing Hardware in a Scala Embedded Language (en)
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  • independent source needed. (en)
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  • Chiselは、デジタル回路設計用の、オープンソースのハードウェア記述言語 (HDL: Hardware Description Language) の一種である。カリフォルニア大学バークレー校で開発が行われている。Chiselは、Scalaの内部DSLとして実装されている。 (ja)
  • The Constructing Hardware in a Scala Embedded Language (Chisel)is an open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level. Chisel is based on Scala as an embedded domain-specific language (DSL). Chisel inherits the object-oriented and functional programming aspects of Scala for describing digital hardware. Using Scala as a basis allows describing circuit generators. High quality, free access documentation exists in several languages. (en)
  • Chisel est un langage informatique open-source de description matériel basé sur Scala. Chisel, pour Constructing Hardware in Scala Embedded Language, permet de décrire des circuits électroniques numériques au niveau du transfert de registres (RTL). Chisel hérite des propriétés objet et fonctionnel de Scala pour décrire du matériel. L'utilisation de Scala comme base permet de se servir de Chisel comme un générateur de circuits électroniques. Il existe également TL-Chisel, l'équivalent en Chisel de TL-Verilog (Transaction-Level Verilog). Exemple Un exemple simple de circuit additionneur. (fr)
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  • Chisel (programming language) (en)
  • Chisel (fr)
  • Chisel (ja)
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  • Constructing Hardware in a Scala Embedded Language (Chisel) (en)
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