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Namespace Prefixes

PrefixIRI
dcthttp://purl.org/dc/terms/
n14http://www.vintage-icl-computers.com/
n11https://fdocuments.net/document/
dbohttp://dbpedia.org/ontology/
foafhttp://xmlns.com/foaf/0.1/
n18https://global.dbpedia.org/id/
n10http://dbpedia.org/resource/Price/
dbthttp://dbpedia.org/resource/Template:
rdfshttp://www.w3.org/2000/01/rdf-schema#
n19https://ieeexplore.ieee.org/document/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
owlhttp://www.w3.org/2002/07/owl#
n15https://revaldinho.github.io/f100l/doc/
wikipedia-enhttp://en.wikipedia.org/wiki/
provhttp://www.w3.org/ns/prov#
dbphttp://dbpedia.org/property/
dbchttp://dbpedia.org/resource/Category:
xsdhhttp://www.w3.org/2001/XMLSchema#
wikidatahttp://www.wikidata.org/entity/
dbrhttp://dbpedia.org/resource/

Statements

Subject Item
dbr:Ferranti_F100-L
rdfs:label
Ferranti F100-L
rdfs:comment
The Ferranti F100-L was a 16-bit microprocessor family announced by Ferranti in 1976 which entered production in 1977. It was the first microprocessor designed in Europe, and among the first 16-bit single-chip CPUs. It was designed with military use in mind, able to work in a very wide temperature range and radiation hardened. To deliver these capabilities, the F100 was implemented using bipolar junction transistors, as opposed to the metal oxide semiconductor (MOS) process used by most other processors of the era. The family included a variety of support chips including a multiply/divide unit, various memory support chips, timers and serial bus controllers.
dct:subject
dbc:Ferranti_computers dbc:16-bit_microprocessors
dbo:wikiPageID
65315590
dbo:wikiPageRevisionID
1095447934
dbo:wikiPageWikiLink
dbr:Bitwise_operation dbr:Ministry_of_Defence_(United_Kingdom) dbr:Ferranti_Atlas dbr:Direct_memory_access dbr:Stack_pointer dbr:Transistor dbr:Medium_scale_integration dbr:Centre_for_Computing_History dbr:Zero_page dbr:Computer_Automated_Measurement_and_Control dbr:Siemens_Plessey dbr:Arithmetic_logic_unit dbr:International_Signal_and_Control n10:performance_ratio dbr:UoSAT-1 dbr:Integrated_circuit dbr:Bell_Labs dbr:Transistor-transistor_logic dbr:Self-propelled_anti-aircraft_gun dbr:Metal_oxide_semiconductor dbr:Bus_(computing) dbr:Small_scale_integration dbr:FV433_Abbot_SPG dbr:MOSFET dbr:Micralign dbr:16-bit dbr:Dual_in-line_package dbr:Radiation_hardening dbr:Ferranti dbr:Ferranti_Mark_1 dbr:Address_bus dbr:FORTRAN dbr:Ferranti-Packard_6000 dbr:Ferranti_Argus dbr:Program_counter dbr:International_Computers_and_Tabulators dbr:Bipolar_transistor dbr:Flip-flop_(electronics) dbr:Accumulator_(computing) dbc:Ferranti_computers dbr:Microprocessor dbr:Museum_of_Science_and_Industry_(Manchester) dbr:Retrocomputing dbr:Processor_register dbr:Addressing_mode dbr:CORAL dbr:Memory_management_unit dbr:Plessey dbc:16-bit_microprocessors dbr:Gate_array dbr:Zilog_Z80 dbr:Sea_Eagle_(missile) dbr:MOS_6502 dbr:Texas_Instruments_TMS9900 dbr:Serial_bus dbr:Bipolar_junction_transistor dbr:Static_random-access_memory dbr:Fairchild_Semiconductor
dbo:wikiPageExternalLink
n11:ferranti-push-for-bigger-share-of-16-bit-market.html n14:icl49baaa n15:F100CPU.html n19:9040116
owl:sameAs
wikidata:Q104856787 n18:FWQWH
dbp:wikiPageUsesTemplate
dbt:Cite_magazine dbt:Efn dbt:Sfn dbt:Code dbt:Reflist dbt:Notelist dbt:Short_description dbt:Cite_conference dbt:Cite_web
dbo:abstract
The Ferranti F100-L was a 16-bit microprocessor family announced by Ferranti in 1976 which entered production in 1977. It was the first microprocessor designed in Europe, and among the first 16-bit single-chip CPUs. It was designed with military use in mind, able to work in a very wide temperature range and radiation hardened. To deliver these capabilities, the F100 was implemented using bipolar junction transistors, as opposed to the metal oxide semiconductor (MOS) process used by most other processors of the era. The family included a variety of support chips including a multiply/divide unit, various memory support chips, timers and serial bus controllers. The F100 was priced at £39 in 1978 in 100-off quantities. Three models were offered at the same price; the commercial spec was rated at 8 MHz, industrial at 6.5 MHz at an extended temperature range, and military spec at 3.5 or 5 MHz with a temperature range from -55 C to +125 C. It was very cost competitive in the industrial and military markets, but less so in the commercial market where processors like the MOS 6502 were about $11 in the same 100 unit quantity. The line was updated with the F200-L in 1984. This was software compatible with the F100, but included the maths processor on the same die, expanded addressing to 128 kB, and allowed up to 1 MB of memory when paired with the new F220 memory management unit. Shortly after the F200 came to market, in 1987 Ferranti purchased International Signal and Control, a company soon discovered to be committing large amounts of fraud; this drove Ferranti into bankruptcy. The chip division was purchased by Plessey who continued producing some of the F100 family support chips as late as 1995. Owing to it being used almost entirely in the military realm, the F100 is little known in the wider retrocomputing field and few examples remain.
prov:wasDerivedFrom
wikipedia-en:Ferranti_F100-L?oldid=1095447934&ns=0
dbo:wikiPageLength
22075
foaf:isPrimaryTopicOf
wikipedia-en:Ferranti_F100-L