About: Single instruction, multiple threads

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: Single instruction, multiple threads Goto Sponge NotDistinct Permalink

An Entity of Type : dbo:Person, within Data Space : dbpedia.org associated with source document(s)
QRcode icon

http://dbpedia.org/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FSingle_instruction%2C_multiple_threads

Single instruction, multiple threads (SIMT) is an execution model used in parallel computing where single instruction, multiple data (SIMD) is combined with multithreading. It is different from SPMD in that all instructions in all "threads" are executed in lock-step. The SIMT execution model has been implemented on several GPUs and is relevant for general-purpose computing on graphics processing units (GPGPU), e.g. some supercomputers combine CPUs with GPUs.

Attributes	Values
rdf:type	person
rdfs:label	SIMT (fr) Single instruction, multiple threads (en)
rdfs:comment	SIMT (de l'anglais : Single Instruction, Multiple Threads, selon la taxonomie de Flynn) est une amélioration de SIMD (de l'anglais : Single Instruction, Multiple Data) qui permettait sur des processeur arithmétique spécialisés de faire des calculs sur plusieurs données en une seule instruction, en l'adaptant au calcul multithread (c'est-à-dire, comportant plusieurs files d'exécution). (fr) Single instruction, multiple threads (SIMT) is an execution model used in parallel computing where single instruction, multiple data (SIMD) is combined with multithreading. It is different from SPMD in that all instructions in all "threads" are executed in lock-step. The SIMT execution model has been implemented on several GPUs and is relevant for general-purpose computing on graphics processing units (GPGPU), e.g. some supercomputers combine CPUs with GPUs. (en)
dcterms:subject	Threads (computing) SIMD computing Classes of computers GPGPU Parallel computing Computer architecture
Wikipage page ID	43320329 (xsd:integer)
Wikipage revision ID	1123650169 (xsd:integer)
Link from a Wikipage to another Wikipage	Threads (computing) GPU SPMD General-purpose computing on graphics processing units GDDR SDRAM Graphics Core Next Multithreading (computer architecture) Arithmetic logic unit Parallel computing Supercomputer CUDA AMD ATI Technologies Advanced Micro Devices SIMD computing DDR SDRAM Multi-core processor Classes of computers TeraScale (microarchitecture) GPGPU Parallel computing Computer architecture Tesla (microarchitecture) Thread (computing) Nvidia OpenCL Video RAM (dual-ported DRAM) XDR DRAM Single instruction, multiple data SIMD lanes Instruction fetching
sameAs	Single instruction, multiple threads Single instruction, multiple threads Single instruction, multiple threads Single instruction, multiple threads Single instruction, multiple threads Single instruction, multiple threads
dbp:wikiPageUsesTemplate	dbt:Mvar dbt:Reflist dbt:Graphics_Processing_Unit
has abstract	SIMT (de l'anglais : Single Instruction, Multiple Threads, selon la taxonomie de Flynn) est une amélioration de SIMD (de l'anglais : Single Instruction, Multiple Data) qui permettait sur des processeur arithmétique spécialisés de faire des calculs sur plusieurs données en une seule instruction, en l'adaptant au calcul multithread (c'est-à-dire, comportant plusieurs files d'exécution). (fr) Single instruction, multiple threads (SIMT) is an execution model used in parallel computing where single instruction, multiple data (SIMD) is combined with multithreading. It is different from SPMD in that all instructions in all "threads" are executed in lock-step. The SIMT execution model has been implemented on several GPUs and is relevant for general-purpose computing on graphics processing units (GPGPU), e.g. some supercomputers combine CPUs with GPUs. The processors, say a number p of them, seem to execute many more than p tasks. This is achieved by each processor having multiple "threads" (or "work-items" or "Sequence of SIMD Lane operations"), which execute in lock-step, and are analogous to SIMD lanes. The simplest way to understand SIMT is to imagine a multi-core system, where each core has its own register file, its own ALUs (both SIMD and Scalar) and its own data cache, but that unlike a standard multi-core system which has multiple independent instruction caches and decoders, as well as multiple independent Program Counter registers, the instructions are synchronously broadcast to all SIMT cores from a single unit with a single instruction cache and a single instruction decoder which reads instructions using a single Program Counter. The key difference between SIMT and SIMD lanes is that each of the SIMT cores may have a completely different Stack Pointer (and thus perform computations on completely different data sets), whereas SIMD lanes are simply part of an ALU that know nothing about memory per se. (en)
gold:hypernym	Model
prov:wasDerivedFrom	wikipedia-en:Single_instruction,_multiple_threads?oldid=1123650169&ns=0
page length (characters) of wiki page	6957 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Single_instruction,_multiple_threads
is Link from a Wikipage to another Wikipage of	Predication (computer architecture) Deep learning processor Hardware acceleration Stream processing 4D vector Flynn's taxonomy Heterogeneous System Architecture SIMT Very long instruction word Single instruction, multiple data Single program, multiple data Single Instruction Multiple Threads SIMD lane Single Instruction Multiple Thread
is Wikipage redirect of	Single Instruction Multiple Threads SIMD lane Single Instruction Multiple Thread
is Wikipage disambiguates of	SIMT
is foaf:primaryTopic of	wikipedia-en:Single_instruction,_multiple_threads

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (61 GB total memory, 49 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software