The Reference Verification Methodology (RVM) is a complete set of metrics and methods for performing Functional verification of complex designs such as for Application-specific integrated circuits or other semiconductor devices. It was published by Synopsys in 2003. RVM is implemented under OpenVera. The SystemVerilog implementation of the RVM is known as the VMM (Verification Methodology Manual). It contains a small library of base classes.
Attributes | Values |
---|---|
rdf:type | |
rdfs:label |
|
rdfs:comment |
|
dcterms:subject | |
Wikipage page ID |
|
Wikipage revision ID |
|
Link from a Wikipage to another Wikipage | |
Link from a Wikipage to an external page | |
sameAs | |
has abstract |
|
gold:hypernym | |
prov:wasDerivedFrom | |
page length (characters) of wiki page |
|
foaf:isPrimaryTopicOf | |
is Link from a Wikipage to another Wikipage of | |
is Wikipage disambiguates of | |
is foaf:primaryTopic of |