SIMD within a register (SWAR), also known by the name "packed SIMD" is a technique for performing parallel operations on data contained in a processor register. SIMD stands for single instruction, multiple data. Flynn's 1972 taxonomy categorises SWAR as "pipelined processing".
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| - En informatique, SWAR est un acronyme signifiant « SIMD Within A Register ». Ce terme a été inventé en 1996 pour faire la différence entre le parallélisme interne à un processeur (comme AltiVec, MMX, SSE, SSE2, SSE3 et, SSE4) et le parallélisme externe, c'est-à-dire la façon de regrouper les processeurs entre eux.
* Portail de l’informatique (fr)
- SIMD within a register (SWAR), also known by the name "packed SIMD" is a technique for performing parallel operations on data contained in a processor register. SIMD stands for single instruction, multiple data. Flynn's 1972 taxonomy categorises SWAR as "pipelined processing". (en)
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| - SIMD within a register (SWAR), also known by the name "packed SIMD" is a technique for performing parallel operations on data contained in a processor register. SIMD stands for single instruction, multiple data. Flynn's 1972 taxonomy categorises SWAR as "pipelined processing". Many modern general-purpose computer processors have some provisions for SIMD, in the form of a group of registers and instructions to make use of them. SWAR refers to the use of those registers and instructions, as opposed to using specialized processing engines designed to be better at SIMD operations. It also refers to the use of SIMD with general-purpose registers and instructions that were not meant to do it at the time, by way of various novel software tricks. (en)
- En informatique, SWAR est un acronyme signifiant « SIMD Within A Register ». Ce terme a été inventé en 1996 pour faire la différence entre le parallélisme interne à un processeur (comme AltiVec, MMX, SSE, SSE2, SSE3 et, SSE4) et le parallélisme externe, c'est-à-dire la façon de regrouper les processeurs entre eux.
* Portail de l’informatique (fr)
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