About: Siddharth Garg

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dbo:academicDiscipline	dbr:Computer_science dbr:Computer_security
dbo:almaMater	dbr:Carnegie_Mellon_University dbr:Stanford_University dbr:IIT_Madras
dbo:description	കമ്പ്യൂട്ടർ ശാസ്ത്രജ്ഞൻ (ml) computer Scientist (en)
dbo:doctoralAdvisor	dbr:Diana_Marculescu
dbo:institution	dbr:New_York_University_Tandon_School_of_Engineering
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dbp:almaMater	Carnegie Mellon University, PhD (en) Indian Institute of Technology, Madras, B.Tech (en) Stanford University, MS (en)
dbp:doctoralAdvisor	dbr:Diana_Marculescu
dbp:fields	dbr:Computer_science dbr:Computer_security
dbp:name	Siddharth Garg (en)
dbp:thesisTitle	System-level modeling and mitigation of the impact of process variations on digital integrated circuits (en)
dbp:thesisUrl	https://cmu.primo.exlibrisgroup.com/permalink/01CMU_INST/6lpsnm/alma991000348899704436
dbp:thesisYear	2009 (xsd:integer)
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rdfs:label	Siddharth Garg (en)
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