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In electrical engineering, noise margin is the maximum voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level. It is commonly used in at least two contexts as follows: In practice, noise margins are the amount of noise, that a logic circuit can withstand.Noise margins are generally defined so that positive values ensure proper operation, and negative margins result in compromised operation, or outright failure.

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  • Noise Margin (de)
  • Noise margin (en)
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  • Der Fachbegriff Noise-Margin (deutsch etwa Reserve eines Signalpegels zum Rauschpegel) bezeichnet in der Nachrichtentechnik jenen Pegel, um welchen ein Nutzsignal an einem Informationsempfänger größer als eine Störgröße sein muss, um einen fehlerfreien Empfang des Nutzsignals zu ermöglichen. Die Störgröße wird als physikalische Rauschgröße (engl. Noise) beschrieben. (de)
  • In electrical engineering, noise margin is the maximum voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level. It is commonly used in at least two contexts as follows: In practice, noise margins are the amount of noise, that a logic circuit can withstand.Noise margins are generally defined so that positive values ensure proper operation, and negative margins result in compromised operation, or outright failure. (en)
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  • Der Fachbegriff Noise-Margin (deutsch etwa Reserve eines Signalpegels zum Rauschpegel) bezeichnet in der Nachrichtentechnik jenen Pegel, um welchen ein Nutzsignal an einem Informationsempfänger größer als eine Störgröße sein muss, um einen fehlerfreien Empfang des Nutzsignals zu ermöglichen. Die Störgröße wird als physikalische Rauschgröße (engl. Noise) beschrieben. Anders ausgedrückt stellt der Noise-Margin eine untere Grenze des Signal-Rausch-Verhältnisses dar, welches der Empfänger für den fehlerfreien Empfang der übermittelten Information benötigt. Ist das Signal-Rausch-Verhältnis kleiner als der Noise-Margin, kommt es im Rahmen der Datenübertragung zu Übertragungsfehlern. Der Noise-Margin kann dabei durch das Einwirken einer zu großen Störgröße, wie dem Rauschen, zu klein werden, oder durch die Dämpfung des Nutzsignalpegels im Übertragungskanal. Der Noise-Margin wird, wie das Signal-Rausch-Verhältnis, als dimensionslose Größe in der Einheit Bel gemessen. Im Telekommunikations-Bereich, zum Beispiel bei digitalen Teilnehmeranschlüssen (DSL), sollte dieser Wert 3 dB bis 4 dB nicht unterschreiten. (de)
  • In electrical engineering, noise margin is the maximum voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level. It is commonly used in at least two contexts as follows: * In communications system engineering, noise margin is the ratio by which the signal exceeds the minimum acceptable amount. It is normally measured in decibels. * In a digital circuit, the noise margin is the amount by which the signal exceeds the threshold for a proper '0' or '1'. For example, a digital circuit might be designed to swing between 0.0 and 1.2 volts, with anything below 0.2 volts considered a '0', and anything above 1.0 volts considered a '1'. Then the noise margin for a '0' would be the amount that a signal is below 0.2 volts, and the noise margin for a '1' would be the amount by which a signal exceeds 1.0 volt. In this case noise margins are measured as an absolute voltage, not a ratio. Noise margins for CMOS chips are usually much greater than those for TTL because the VOH min is closer to the power supply voltage and VOL max is closer to zero. * Real digital inverters do not instantaneously switch from a logic high (1) to a logic low (0), there is some capacitance. While an inverter is transitioning from a logic high to low, there is an undefined region where the voltage cannot be considered high or low. This is considered a noise margin. There are two noise margins to consider: Noise margin high (NMH) and noise margin low (NML). NMH is the amount of voltage between an inverter transitioning from a logic high (1) to a logic low (0) and vice versa for NML. The equations are as follows: NMH ≡ VOH - VIH and NML ≡ VIL - VOL. Typically, in a CMOS inverter VOH will equal VDD and VOL will equal the ground potential, as mentioned above. * VIH is defined as the highest input voltage at which the slope of the voltage transfer characteristic (VTC) is equal to -1, where the VTC is the plot of all valid output voltages vs. input voltages. Similarly, VIL is defined as the lowest input voltage where slope of the VTC is equal to -1. In practice, noise margins are the amount of noise, that a logic circuit can withstand.Noise margins are generally defined so that positive values ensure proper operation, and negative margins result in compromised operation, or outright failure. (en)
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