About: NVAX

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: NVAX Goto Sponge NotDistinct Permalink

An Entity of Type : yago:Whole100003553, within Data Space : dbpedia.org associated with source document(s)
QRcode icon

http://dbpedia.org/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FNVAX

The NVAX is a CMOS microprocessor developed and produced by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). A variant of the NVAX, the NVAX+, differed in the bus interface and external cache supported, but was otherwise identical in regards to microarchitecture. The NVAX+ was designed to have the same bus as the DECchip 21064, allowing drop-in replacement. The final model in the series was the NVAX++, or NV5, offering 50 VUPs. This was the last VAX processor, DEC had moved entirely to the DEC Alpha after that point.

Attributes	Values
rdf:type	yago:WikicatDECMicroprocessors yago:Artifact100021939 yago:Chip103020034 yago:Conductor103088707 yago:Device103183080 yago:Instrumentality103575240 yago:Microprocessor103760310 yago:Object100002684 yago:PhysicalEntity100001930 yago:SemiconductorDevice104171831 yago:Whole100003553
rdfs:label	NVAX (en)
rdfs:comment	The NVAX is a CMOS microprocessor developed and produced by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). A variant of the NVAX, the NVAX+, differed in the bus interface and external cache supported, but was otherwise identical in regards to microarchitecture. The NVAX+ was designed to have the same bus as the DECchip 21064, allowing drop-in replacement. The final model in the series was the NVAX++, or NV5, offering 50 VUPs. This was the last VAX processor, DEC had moved entirely to the DEC Alpha after that point. (en)
foaf:depiction
dcterms:subject	DEC microprocessors 32-bit microprocessors
Wikipage page ID	3906379 (xsd:integer)
Wikipage revision ID	1098014017 (xsd:integer)
Link from a Wikipage to another Wikipage	VAX 6000 VAX VAX 7000/10000 VAX 9000 Control store Pin grid array MicroVAX Microcode DEC Alpha Alpha 21064 DEC microprocessors Die (integrated circuit) Semiconductor device fabrication 32-bit microprocessors Digital Equipment Corporation CMOS Instruction set architecture Microprocessor VAX Unit of Performance VAXft VAXstation VAX 4000 Aluminium interconnect
Link from a Wikipage to an external page	http://www.vaxmacro.de/vcms.html http://simh.trailing-edge.com/semi/nvax.html http://www.1000bit.it/ad/bro/digital/djt/dtj_v04-03_1992.pdf https://www.youtube.com/watch%3Fv=YKzDXKmn66U%3Ft=3m5s http://www.hpl.hp.com/hpjournal/dtj/vol4num3/vol4num3art1.pdf
sameAs	NVAX NVAX NVAX NVAX NVAX
dbp:wikiPageUsesTemplate	dbt:Cite_web dbt:For dbt:ISBN dbt:ISSN dbt:List_journal dbt:Digital_Equipment_Corporation
thumbnail	wiki-commons:Special:FilePath/DEC_NVAX_die.jpg?width=300
date	Summer 1992 (en)
ISSN	898 (xsd:integer)
issue	3 (xsd:integer)
publisher	Digital Equipment Corporation (en)
url	http://www.1000bit.it/ad/bro/digital/djt/dtj_v04-03_1992.pdf
volume	4 (xsd:integer)
has abstract	The NVAX is a CMOS microprocessor developed and produced by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). A variant of the NVAX, the NVAX+, differed in the bus interface and external cache supported, but was otherwise identical in regards to microarchitecture. The NVAX+ was designed to have the same bus as the DECchip 21064, allowing drop-in replacement. The NVAX and NVAX+ was used in late-model VAX systems released in 1991 such as the MicroVAX 3100, VAXstation 4000, VAX 4000, VAX 6000, VAX 7000/10000 and VAXft. Although Digital updated the design throughout the early 1990s, the processors, and the VAX platform itself, were ultimately superseded by the introduction of the DECchip 21064, an implementation of the Alpha (then Alpha AXP) architecture, and the resulting systems in November 1992. The NVAX was offered at a variety of clock speeds, 83.3 MHz (12 ns), 71 MHz (14 ns) and 62.5 MHz (16 ns), while the NVAX+ is clocked at a frequency of 90.9 MHz (11 ns). The NVAX offered about 25 VAX Unit of Performance (VUPs), while the NVAX+ was roughly 35 VUPs. This was only slightly less than the VAX 9000 mainframe's roughly 40 VUPs, but available in a desktop form factor. The final model in the series was the NVAX++, or NV5, offering 50 VUPs. This was the last VAX processor, DEC had moved entirely to the DEC Alpha after that point. (en)
journal	Digital Technical Journal: special issue on NVAX-microprocessor VAX systems (en)
gold:hypernym	Microprocessor
prov:wasDerivedFrom	wikipedia-en:NVAX?oldid=1098014017&ns=0
page length (characters) of wiki page	5522 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:NVAX
is Link from a Wikipage to another Wikipage of	VAX 6000 VAX VAX 9000 List of microprocessors Emitter-coupled logic MicroVAX VAX 8000 History of computing hardware Digital Equipment Corporation Microprocessor chronology VAXft VAXstation VAX 4000 VAX 7000 and VAX 10000 NVAX+ NVAX++
is Wikipage redirect of	NVAX+ NVAX++
is foaf:primaryTopic of	wikipedia-en:NVAX

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (62 GB total memory, 35 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software