About: Logic simulation

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: Logic simulation Goto Sponge NotDistinct Permalink

An Entity of Type : dbo:MusicGenre, within Data Space : dbpedia.org associated with source document(s)
QRcode icon

http://dbpedia.org/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FLogic_simulation

Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level.

Attributes	Values
rdf:type	music genre
rdfs:label	Simulateur logique (fr) Logic simulation (en) 逻辑仿真 (zh)
rdfs:comment	Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level. (en) Un simulateur logique est un logiciel qui permet de valider un schéma d'électronique numérique avant sa réalisation.La pratique du simulateur logique permet aussi d'acquérir une solide expérience des circuits numériques, sans devoir aller jusqu'à la réalisation. (fr) 逻辑仿真（英語：logic simulation），或称逻辑模拟，是对硬件描述语言所定义数字电路行为的预测与检验，通常可以利用计算机仿真实现。逻辑仿真可以在具有不同物理抽象层次（级别）下进行，例如晶体管级、逻辑门级、寄存器传输级和行为级。其基本原理是使用计算机软件模拟一个激励信号，然后观察所设计电路的响应行为。 (zh)
dcterms:subject	Electronic design automation Electronic circuit verification Logic design
Wikipage page ID	3506842 (xsd:integer)
Wikipage revision ID	1058301362 (xsd:integer)
Link from a Wikipage to another Wikipage	Electronic system-level design and verification Electronic design automation SPICE Clock gating Computer simulation Functional verification Parallel computing Distributed computing Logic synthesis Formal verification Digital circuit List of HDL simulators Power gating Register-transfer level Hardware description language Abstraction (computer science) Code coverage Electronic circuit verification Logic design Field-programmable gate array Static timing analysis Verification and validation Discrete event simulation Asynchronous logic
sameAs	Logic simulation Logic simulation Logic simulation Logic simulation Logic simulation Logic simulation
dbp:wikiPageUsesTemplate	dbt:Redirect dbt:Reflist
has abstract	Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level. (en) Un simulateur logique est un logiciel qui permet de valider un schéma d'électronique numérique avant sa réalisation.La pratique du simulateur logique permet aussi d'acquérir une solide expérience des circuits numériques, sans devoir aller jusqu'à la réalisation. (fr) 逻辑仿真（英語：logic simulation），或称逻辑模拟，是对硬件描述语言所定义数字电路行为的预测与检验，通常可以利用计算机仿真实现。逻辑仿真可以在具有不同物理抽象层次（级别）下进行，例如晶体管级、逻辑门级、寄存器传输级和行为级。其基本原理是使用计算机软件模拟一个激励信号，然后观察所设计电路的响应行为。 (zh)
gold:hypernym	Use
prov:wasDerivedFrom	wikipedia-en:Logic_simulation?oldid=1058301362&ns=0
page length (characters) of wiki page	5648 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Logic_simulation
is Link from a Wikipage to another Wikipage of	Property Specification Language Electronic design automation Application-specific integrated circuit Reliability (semiconductor) V850 VHDL Verilator Integrated circuit design Intelligent verification Reconvergent fan-out Robot Odyssey Functional verification Hardware emulation Power optimization (EDA) Daisy Systems Brian Silverman Digital electronics Formal equivalence checking Microcontroller Random test generator Register-transfer level Hardware description language Tcl Accuracy and precision Chisel (programming language) High-level verification JTAG Automatic test pattern generation XAP processor Static timing analysis Value change dump Simulation software Power network design (IC) Outline of electronics P-CAD Function simulation Functional simulation Simulation (EDA) Logic simulator
is Wikipage redirect of	Function simulation Functional simulation Simulation (EDA) Logic simulator
is foaf:primaryTopic of	wikipedia-en:Logic_simulation

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (61 GB total memory, 49 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software