About: Iddq testing

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: Iddq testing Goto Sponge NotDistinct Permalink

An Entity of Type : yago:Whole100003553, within Data Space : dbpedia.org associated with source document(s)
QRcode icon

http://dbpedia.org/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FIddq_testing

Iddq testing is a method for testing CMOS integrated circuits for the presence of manufacturing faults. It relies on measuring the supply current (Idd) in the quiescent state (when the circuit is not switching and inputs are held at static values). The current consumed in the state is commonly called Iddq for Idd (quiescent) and hence the name.

Attributes	Values
rdf:type	software yago:Artifact100021939 yago:Circuit103033362 yago:ComputerCircuit103084420 yago:Device103183080 yago:ElectricalDevice103269401 yago:Instrumentality103575240 yago:IntegratedCircuit103577090 yago:Object100002684 yago:PhysicalEntity100001930 yago:WikicatIntegratedCircuits yago:Whole100003553
rdfs:label	Iddq testing (en)
rdfs:comment	Iddq testing is a method for testing CMOS integrated circuits for the presence of manufacturing faults. It relies on measuring the supply current (Idd) in the quiescent state (when the circuit is not switching and inputs are held at static values). The current consumed in the state is commonly called Iddq for Idd (quiescent) and hence the name. (en)
dcterms:subject	Integrated circuits
Wikipage page ID	3954002 (xsd:integer)
Wikipage revision ID	984107082 (xsd:integer)
Link from a Wikipage to another Wikipage	Moore's law Controllability Test vector Logic gate Power gating Integrated circuits CMOS Integrated circuits Scan chain Observability Stuck-at fault System on chip Semiconductor manufacturing
Link from a Wikipage to an external page	http://www.qstar.be/html/about_iddq.html http://www.ttt.com/downloads/iddq.pdf https://www.date-conference.com/ https://web.archive.org/web/20070607061959/http:/www.ttt.com/downloads/iddq.pdf https://www.researchgate.net/publication/234824837 https://www.researchgate.net/publication/3735203
sameAs	Iddq testing Iddq testing Iddq testing Iddq testing
dbp:wikiPageUsesTemplate	dbt:Cite_book dbt:Cite_conference dbt:Cite_journal dbt:Cite_web dbt:Reflist
has abstract	Iddq testing is a method for testing CMOS integrated circuits for the presence of manufacturing faults. It relies on measuring the supply current (Idd) in the quiescent state (when the circuit is not switching and inputs are held at static values). The current consumed in the state is commonly called Iddq for Idd (quiescent) and hence the name. Iddq testing uses the principle that in a correctly operating quiescent CMOS digital circuit, there is no static current path between the power supply and ground, except for a small amount of leakage. Many common semiconductor manufacturing faults will cause the current to increase by orders of magnitude, which can be easily detected. This has the advantage of checking the chip for many possible faults with one measurement. Another advantage is that it may catch faults that are not found by conventional stuck-at fault test vectors. Iddq testing is somewhat more complex than just measuring the supply current. If a line is shorted to Vdd, for example, it will still draw no extra current if the gate driving the signal is attempting to set it to '1'. However, a different input that attempts to set the signal to 0 will show a large increase in quiescent current, signalling a bad part. Typical Iddq tests may use 20 or so inputs. Note that Iddq test inputs require only controllability, and not observability. This is because the observability is through the shared power supply connection. (en)
gold:hypernym	Method
prov:wasDerivedFrom	wikipedia-en:Iddq_testing?oldid=984107082&ns=0
page length (characters) of wiki page	5090 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Iddq_testing
is Link from a Wikipage to another Wikipage of	Design for testing Leakage (electronics) Logic redundancy Power optimization (EDA) Power gating Idd (quiescent) testing Iddq Scan chain Stuck-at fault
is Wikipage redirect of	Idd (quiescent) testing Iddq
is foaf:primaryTopic of	wikipedia-en:Iddq_testing

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (378 GB total memory, 50 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software