About: ILLIAC IV

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: ILLIAC IV Goto Sponge NotDistinct Permalink

An Entity of Type : yago:WikicatEarlyComputers, within Data Space : dbpedia.org associated with source document(s)
QRcode icon

http://dbpedia.org/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FILLIAC_IV

The ILLIAC IV was the first massively parallel computer. The system was originally designed to have 256 64-bit floating point units (FPUs) and four central processing units (CPUs) able to process 1 billion operations per second. Due to budget constraints, only a single "quadrant" with 64 FPUs and a single CPU was built. Since the FPUs all had to process the same instruction – ADD, SUB etc. – in modern terminology the design would be considered to be single instruction, multiple data, or SIMD.

Attributes	Values
rdf:type	yago:WikicatMainframeComputers yago:WikicatMassivelyParallelComputers yago:WikicatOne-of-a-kindComputers yago:WikicatSupercomputers yago:Artifact100021939 yago:Computer103082979 yago:Device103183080 yago:DigitalComputer103196324 yago:Instrumentality103575240 yago:Machine103699975 yago:Mainframe103711711 yago:Object100002684 yago:PhysicalEntity100001930 military conflict yago:Supercomputer104358117 yago:Whole100003553 yago:WikicatEarlyComputers
rdfs:label	ILLIAC IV (ca) ILLIAC IV (es) ILLIAC IV (en) ILLIAC IV (it) ILLIAC IV (ja) ILLIAC IV (pt)
rdfs:comment	El ILLIAC IV fue uno de los primeros supercomputadores de la historia. Uno de la serie de máquinas de investigación, los de la Universidad de Illinois, el diseño del ILLIAC IV se caracterizó por un nivel bastante alto de paralelismo con hasta 256 procesadores, solía permitir a la máquina trabajar en grandes conjuntos de datos en lo que más tarde se conocería como procesamiento vectorial. Después de varios retrasos y rediseños, la computadora fue entregada al Ames Research Center de la NASA, en las afueras de San Francisco, en 1971. Después de las pruebas y de 4 años de uso por parte de la NASA, el ILLIAC IV fue conectado a la para uso distribuido en noviembre de 1975, convirtiéndose en el primer supercomputador disponible en red, adelantándose al Cray-1 por casi 12 meses. (es) L'ILLIAC IV è uno dei più famosi supercomputer. Fu l'ultimo di una serie di computer di ricerca dell'University of Illinois. Il progetto dell'ILLIAC IV è un progetto basato su un parallelismo massivo con 256 processori, sviluppato per trattare grandi quantità di dati, un'idea che è alla base dei processori vettoriali. La macchina fu alla fine presentata nel 1976, dopo un decennio di sviluppo ed era molto in ritardo, molto costosa e con prestazioni molto inferiori a macchine come il Cray-1. (it) ILLIAC IV（イリアック・フォー）は、イリノイ大学アーバナ・シャンペーン校の一連の研究から生み出された最後のコンピュータである。パターソン＆ヘネシーは本機を「間違いなく、スーパーコンピューター・プロジェクトの歴史上で最も不名誉なものであろう。」としている。ILLIAC IV の設計の鍵は、256 プロセッサによる高い並列性で、後にSIMDと呼ばれる、同時に多数のデータセットを処理することを指向していた。マシンは十年の開発期間を経て1975年に完全に稼働した。 (ja) O ILLIAC IV foi um supercomputador construído pela a Universidade de Illinois e financiado pelo o governo dos Estados Unidos, sua construção custou 31 milhões de dólares. O projeto terminou em 1981. (pt) L'ILLIAC IV és un ordinador, considerat el primer de còmput paral·lel massiu. El sistema es va dissenyar inicialment amb 256 unitats de coma flotant (FPU) i quatre Unitats Centrals de Processament (CPUs) capaces de processar mil milions d'operacions per segon (1 GFLOP). Degut a problemes de pressupost, només van ser desenvolupats un únic "quadrant" amb 64 FPU i una sola CPU. Ja que totes les FPU havien de processar la mateixa instrucció en un moment donat - ADD, SUB etc. - En terminologia moderna, el disseny es consideraria de Single Instruction, Multiple Data, o SIMD. (ca) The ILLIAC IV was the first massively parallel computer. The system was originally designed to have 256 64-bit floating point units (FPUs) and four central processing units (CPUs) able to process 1 billion operations per second. Due to budget constraints, only a single "quadrant" with 64 FPUs and a single CPU was built. Since the FPUs all had to process the same instruction – ADD, SUB etc. – in modern terminology the design would be considered to be single instruction, multiple data, or SIMD. (en)
foaf:depiction
dcterms:subject	Massively parallel computers One-of-a-kind computers Parallel computing Supercomputers
Wikipage page ID	195963 (xsd:integer)
Wikipage revision ID	1119604535 (xsd:integer)
Link from a Wikipage to another Wikipage	Amdahl's law 64-bit Princeton University Processor register Rome Laboratory Bell Labs John von Neumann US Navy United States Marine Corps Univac University of Illinois Urbana–Champaign University of Wisconsin–Madison Information Processing Techniques Office Input/output Instruction scheduling Integrated circuit Radar Advanced Research Projects Agency Memory bus Computer History Museum Cray-1 Electrical impedance Engineering Research Associates GiB Branch (computer science) Muhammad Ali vs. Sonny Liston Connection Machine Core memory Crosstalk Thinking Machines Corporation Silicon Valley Sterling Hall bombing Computer language Emitter-coupled logic Bits per second Parallel Element Processing Ensemble Program counter Terabit Burroughs large systems CDC 7600 CDC STAR-100 Westinghouse Electric Corporation Leading-one detector Thin-film memory Williams tube ALGOL ARPANET Aeronca Aircraft FORTRAN Fairchild Semiconductor Barrel shifter PDP-10 Central processing unit Daniel Slotnick Floating point Logic gate Resistor Hans Mark Ivan Sutherland Texas Instruments Vector processor Massively parallel computers One-of-a-kind computers

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (378 GB total memory, 53 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software