. "DDR2 SDRAM (Double-Data-Rate2 Synchronous Dynamic Random Access Memory) \u306F\u3001\u534A\u5C0E\u4F53\u96C6\u7A4D\u56DE\u8DEF\u3067\u69CB\u6210\u3055\u308C\u308BDRAM\u306E\u898F\u683C\u306E\u4E00\u7A2E\u3067\u3042\u308B\u3002 4\u30D3\u30C3\u30C8\u306E\u30D7\u30EA\u30D5\u30A7\u30C3\u30C1\u6A5F\u80FD\uFF08CPU\u304C\u30C7\u30FC\u30BF\u3092\u5FC5\u8981\u3068\u3059\u308B\u524D\u306B\u30E1\u30E2\u30EA\u304B\u3089\u5148\u8AAD\u307F\u3057\u3066\u53D6\u308A\u51FA\u3059\u6A5F\u80FD\uFF09\u3092\u3082\u3064\u3002\u5185\u90E8\u30AF\u30ED\u30C3\u30AF\u306E2\u500D\u306E\u5916\u90E8\u30AF\u30ED\u30C3\u30AF\u3092\u7528\u3044\u308B\u305F\u3081\u3001\u30AF\u30ED\u30C3\u30AF\u306E\u7B49\u500D\u3067\u52D5\u4F5C\u3059\u308BDDR SDRAM\u306E2\u500D\u3001SDRAM\u306E4\u500D\u306E\u30C7\u30FC\u30BF\u8EE2\u9001\u901F\u5EA6\u304C\u7406\u8AD6\u4E0A\u5F97\u3089\u308C\u308B\u3002\u30D1\u30FC\u30BD\u30CA\u30EB\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306B\u304A\u3044\u30662005\u5E74\u301C2009\u5E74\u9803\uFF08Pentium 4\u5F8C\u671F\u301CIntel Core 2\uFF09\u306E\u4E3B\u8981\u306A\u30E1\u30A4\u30F3\u30E1\u30E2\u30EA\u3068\u3057\u3066\u3001\u643A\u5E2F\u96FB\u8A71\u306B\u304A\u3044\u3066\u306F2011\u5E74\u304B\u3089\uFF08Cortex-A9\u306A\u3069\uFF09\u7528\u3044\u3089\u308C\u3066\u3044\u308B\u3002"@ja . . ""@en . . . "4"^^ . "270263"^^ . . . "DDR2 \u00E4r en typ av arbetsminne till datorer som tidigare bara kunde anv\u00E4ndas till Intels moderkort med chipseten 775, 975, 967, 955, 945, 925 och 915. \u00C4ven vissa VIA-kretsar klarar av DDR2, t.ex. P4M890. Under sommaren 2006 lanserade AMD en ny processorsockel, AM2, som \u00E4ven den ger AMD-processorerna st\u00F6d f\u00F6r DDR2. F\u00F6rdelen med DDR2 \u00E4r den \u00F6kade klockfrekvensen och nackdelen den l\u00E5nga f\u00F6rdr\u00F6jningen. DDR2-minnena \u00E4r ej bak\u00E5tkompatibla med DDR eftersom DDR2 bland annat har andra signalniv\u00E5er, andra hastigheter och 240 anslutningar mot DDR SDRAMs 184 stycken."@sv . . "2"^^ . . . "DDR2 SDRAM"@ko . . . . . "Double Data Rate 2 Synchronous Dynamic Random-Access Memory (DDR2 SDRAM) is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) interface. It superseded the original DDR SDRAM specification, and was itself superseded by DDR3 SDRAM (launched in 2007). DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR. In addition to double pumping the data bus as in DDR SDRAM (transferring data on the rising and falling edges of the bus clock signal), DDR2 allows higher bus speed and requires lower power by running the internal clock at half the speed of the data bus. The two factors combine to produce a total of four data transfers per internal clock cycle. Since the DDR2 internal clock runs at half the DDR external clock rate, DDR2 memory operating at the same external data bus clock rate as DDR results in DDR2 being able to provide the same bandwidth but with better latency. Alternatively, DDR2 memory operating at twice the external data bus clock rate as DDR may provide twice the bandwidth with the same latency. The best-rated DDR2 memory modules are at least twice as fast as the best-rated DDR memory modules.The maximum capacity on commercially available DDR2 DIMMs is 8GB, but chipset support and availability for those DIMMs is sparse and more common 2GB per DIMM are used."@en . "(\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: DDR2 SDRAM)\u200F \u0648\u0647\u064A \u062A\u0642\u0646\u064A\u0629 \u0630\u0627\u0643\u0631\u0629 \u0648\u0644\u0648\u062C \u0639\u0634\u0648\u0627\u0626\u064A \u062A\u0633\u062A\u062E\u062F\u0645 \u0644\u0644\u062A\u062E\u0632\u064A\u0646 \u0639\u0627\u0644\u064A \u0627\u0644\u0633\u0631\u0639\u0629 \u0644\u0644\u0645\u0639\u0637\u064A\u0627\u062A \u0627\u0644\u062A\u064A \u064A\u062A\u0645 \u0627\u0644\u0639\u0645\u0644 \u0639\u0644\u064A\u0647\u0627 \u0641\u064A \u0627\u0644\u062D\u0627\u0633\u0628 \u0623\u0648 \u0627\u0644\u0623\u062C\u0647\u0632\u0629 \u0627\u0644\u0625\u0644\u0643\u062A\u0631\u0648\u0646\u064A\u0629 \u0627\u0644\u0631\u0642\u0645\u064A\u0629 \u0627\u0644\u0623\u062E\u0631\u0649. \u0648\u0647\u064A \u0646\u0648\u0639 \u0645\u0646 \u0623\u0646\u0648\u0627\u0639 \u0627\u0644\u0630\u0648\u0627\u0643\u0631 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 SDRAM \u0627\u0644\u062A\u064A \u0647\u064A \u0628\u062F\u0648\u0631\u0647\u0627 \u0646\u0648\u0639 \u0645\u0646 \u0630\u0648\u0627\u0643\u0631 \u0627\u0644\u062F\u064A \u0631\u0627\u0645 DRAM \u0648\u0647\u064A \u062A\u0639\u062A\u0628\u0631 \u0646\u0642\u0644\u0629 \u0646\u0648\u0639\u064A\u0629 \u0639\u0646 \u0633\u0627\u0628\u0642\u062A\u0647\u0627 \u062F\u064A \u062F\u064A \u0622\u0631 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 DDR SDRAM \u0625\u0646 \u0627\u064A\u062C\u0627\u0628\u064A\u062A\u0647\u0627 \u0627\u0644\u0623\u0633\u0627\u0633\u064A\u0629 \u062A\u0643\u0645\u0646 \u0641\u064A \u0625\u0645\u0643\u0627\u0646\u064A\u062A\u0647\u0627 \u0639\u0644\u0649 \u062A\u0634\u063A\u064A\u0644 \u0646\u0627\u0642\u0644\u0647\u0627 \u0623\u0633\u0631\u0639 \u0628\u0645\u0631\u062A\u064A\u0646 \u0645\u0646 \u062E\u0644\u0627\u064A\u0627\u0647\u0627 \u0627\u0644\u062F\u0627\u062E\u0644\u064A\u0629 \u0645\u0645\u0627 \u064A\u0639\u0646\u064A \u0633\u0631\u0639\u0627\u062A \u0645\u0645\u0631 \u0623\u0639\u0644\u0649 \u0648\u0637\u0627\u0642\u0629 \u0625\u0646\u062A\u0627\u062C\u064A\u0629 \u0623\u0639\u0644\u0649 \u0645\u0646 \u0633\u0627\u0628\u0642\u0627\u062A\u0647\u0627."@ar . . . "Double Data Rate 2 Synchronous Dynamic Random-Access Memory (mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona com fluxo de dados duplo tipo 2, DDR2 SDRAM) \u00E9 uma interface de mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mico s\u00EDncrono (DDR) de taxa de dados dupla (SDRAM). Ele substituiu a especifica\u00E7\u00E3o DDR SDRAM original e foi substitu\u00EDdo pelo DDR3 SDRAM (lan\u00E7ado em 2007). DDR2 DIMMs n\u00E3o s\u00E3o nem para a frente compat\u00EDvel com DDR3 e nem compat\u00EDvel com DDR. Al\u00E9m de bombear duplamente o barramento de dados com no DDR SDRAM (transfer\u00EAncia de dados nas bordas ascendentes e decrescentes no sinal de clock do barrament), o DDR2 permite maior velocidade do barramento e requer menor pot\u00EAncia executando o clock interno na metade da velocidade do barramento de dados. Os dois fatores se combinam para produzir um total de quatro tranfer\u00EAncias de dados por ciclo de clock interno. Como o clock interno da DDR2 funciona com metade da taxa de clock externo do DDR, a mem\u00F3ria DDR2 operando na mesma taxa de clock do barramento de dados externo que a DDR resulta na DDR2 sendo capaz de fornecer a mesma largunra de banda, mas com melhor lat\u00EAncia. Alternativamente, a mem\u00F3ria DDR2 operando com o dobro da taxa de clock do barramento de dados externo como DDR pode fornecer o dobro da largura de banda com a mesma lat\u00EAncia. Os m\u00F3dulos de mem\u00F3ria DDR2 com melhor classifica\u00E7\u00E3o s\u00E3o pelo menos duas vezes mais r\u00E1pidos que os m\u00F3dulos de mem\u00F3ria DDR com melhor classficai\u00E7\u00E3o. A capacidade m\u00E1xima em DIMMs DDR2 comercialmente dispon\u00EDveis \u00E9 de 8 GB, mas o suporte e a disponibilidade do chipset para DIMMs s\u00E3o escasso e s\u00E3o usados 2 GB mais comuns por DIMM."@pt . "DDR2 SDRAM"@zh . "1.8"^^ . . "10"^^ . "DDR2 SDRAM"@pt . . . ""@en . . . . "DDR2-1066"@en . . ""@en . . . "18013"^^ . . "Double Data Rate 2 Synchronous Dynamic Random-Access Memory"@en . "DDR2 \u00E4r en typ av arbetsminne till datorer som tidigare bara kunde anv\u00E4ndas till Intels moderkort med chipseten 775, 975, 967, 955, 945, 925 och 915. \u00C4ven vissa VIA-kretsar klarar av DDR2, t.ex. P4M890. Under sommaren 2006 lanserade AMD en ny processorsockel, AM2, som \u00E4ven den ger AMD-processorerna st\u00F6d f\u00F6r DDR2. F\u00F6rdelen med DDR2 \u00E4r den \u00F6kade klockfrekvensen och nackdelen den l\u00E5nga f\u00F6rdr\u00F6jningen. DDR2-minnena \u00E4r ej bak\u00E5tkompatibla med DDR eftersom DDR2 bland annat har andra signalniv\u00E5er, andra hastigheter och 240 anslutningar mot DDR SDRAMs 184 stycken."@sv . . . . . "DDR2-SDRAM"@de . "DDR2 SDRAM"@en . . . "DDR2 SDRAM (anglicky double-data-rate 2 SDRAM) byl typ opera\u010Dn\u00ED pam\u011Bti pro po\u010D\u00EDta\u010De standardizovan\u00FD organizac\u00ED JEDEC v roce 2003. Prvn\u00ED varianty taktovan\u00E9 na 200 a 266 MHz dosahovaly kv\u016Fli vy\u0161\u0161\u00ED CAS latenci ni\u017E\u0161\u00EDch v\u00FDkon\u016F, ne\u017E p\u0159edchoz\u00ED generace DDR SDRAM. Teprve na konci roku 2004 byly na trh uvedeny moduly s ni\u017E\u0161\u00EDmi latencemi a t\u00EDm i vy\u0161\u0161\u00ED rychlost\u00ED. Nov\u011B byly DDR2 SDRAM dod\u00E1v\u00E1ny v DIMM modulech s 240 v\u00FDvody."@cs . . . . . . . ""@en . "100"^^ . . . . "DDR2-533"@en . "DDR2 SDRAM"@en . . . . . "( DDR2\uB294 \uC5EC\uAE30\uB85C \uC5F0\uACB0\uB429\uB2C8\uB2E4. \uBE44\uB514\uC624 \uAC8C\uC784\uC5D0 \uB300\uD574\uC11C\uB294 \uBB38\uC11C\uB97C \uCC38\uACE0\uD558\uC2ED\uC2DC\uC624.) \uC804\uC790 \uACF5\uD559\uC5D0\uC11C DDR2 SDRAM\uC740 \uCEF4\uD4E8\uD130\uC640 \uB2E4\uB978 \uB514\uC9C0\uD138 \uD68C\uB85C \uC7A5\uCE58\uC5D0\uC11C \uB370\uC774\uD130\uB97C \uBE60\uB974\uAC8C \uCC98\uB9AC\uD558\uB294 \uB370 \uC4F0\uC774\uB294 \uB7A8 \uAE30\uC220\uC774\uB2E4. \uC218\uB9CE\uC740 \uB514\uB7A8 \uAC00\uC6B4\uB370 \uD558\uB098\uC778 SDRAM\uACC4 \uAE30\uC220\uC758 \uC77C\uBD80\uC774\uBA70, \uC774\uC804 \uAE30\uC220\uC778 DDR SDRAM\uC5D0 \uC774\uC5B4 \uB208\uC5D0 \uB744\uAC8C \uAC1C\uC120\uB418\uC5C8\uB2E4. \uC8FC\uB41C \uC774\uC810\uC740 \uC678\uBD80 \uB370\uC774\uD130 \uBC84\uC2A4\uB97C DDR SDRAM\uC758 \uB450 \uBC30 \uB9CC\uD07C \uBE60\uB974\uAC8C \uB3D9\uC791\uD55C\uB2E4\uB294 \uAC83\uC774\uB2E4. \uC774\uB7EC\uD55C \uC774\uC810\uC740 \uAC1C\uC120\uB41C \uBC84\uC2A4 \uC2DC\uADF8\uB110\uB9C1\uC744 \uD1B5\uD574 \uC218\uD589\uB41C\uB2E4. DDR2 \uBA54\uBAA8\uB9AC\uB294 DDR \uBA54\uBAA8\uB9AC\uC640 \uAC19\uC740 \uD074\uB7ED\uC744 \uAC00\uC84C\uC73C\uBBC0\uB85C \uAC19\uC740 \uB300\uC5ED\uC744 \uC81C\uACF5\uD558\uC9C0\uB9CC \uAC00 \uAF64 \uB192\uAE30 \uB54C\uBB38\uC5D0 \uC131\uB2A5\uC774 \uB5A8\uC5B4\uC9C8 \uC218 \uC788\uB2E4."@ko . . "DDR2 SDRAM (\u0430\u043D\u0433\u043B. double-data-rate two synchronous dynamic random access memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430\u044F \u0434\u0438\u043D\u0430\u043C\u0438\u0447\u0435\u0441\u043A\u0430\u044F \u043F\u0430\u043C\u044F\u0442\u044C \u0441 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u043B\u044C\u043D\u044B\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0438 \u0443\u0434\u0432\u043E\u0435\u043D\u043D\u043E\u0439 \u0441\u043A\u043E\u0440\u043E\u0441\u0442\u044C\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0438 \u0434\u0430\u043D\u043D\u044B\u0445, \u0432\u0442\u043E\u0440\u043E\u0435 \u043F\u043E\u043A\u043E\u043B\u0435\u043D\u0438\u0435) \u2014 \u044D\u0442\u043E \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u043F\u0430\u043C\u044F\u0442\u0438, \u0438\u0441\u043F\u043E\u043B\u044C\u0437\u0443\u0435\u043C\u043E\u0439 \u0432 \u0432\u044B\u0447\u0438\u0441\u043B\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0442\u0435\u0445\u043D\u0438\u043A\u0435 \u0432 \u043A\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u0438 \u0432\u0438\u0434\u0435\u043E\u043F\u0430\u043C\u044F\u0442\u0438. \u041F\u0440\u0438\u0448\u043B\u0430 \u043D\u0430 \u0441\u043C\u0435\u043D\u0443 \u043F\u0430\u043C\u044F\u0442\u0438 DDR SDRAM. \u041F\u0430\u043C\u044F\u0442\u044C DDR2 \u0431\u044B\u043B\u0430 \u0432\u0432\u0435\u0434\u0435\u043D\u0430 \u0432\u043E \u0432\u0442\u043E\u0440\u043E\u043C \u043A\u0432\u0430\u0440\u0442\u0430\u043B\u0435 2003 \u0433\u043E\u0434\u0430, \u043A\u043E\u043D\u043A\u0443\u0440\u0435\u043D\u0442\u043E\u0441\u043F\u043E\u0441\u043E\u0431\u043D\u043E\u0439 \u0441 DDR \u0441\u0442\u0430\u043B\u0430 \u043A \u043A\u043E\u043D\u0446\u0443 2004 \u0433\u043E\u0434\u0430.\u0412 2010-\u0445 \u0431\u044B\u043B\u0430 \u0432 \u0437\u043D\u0430\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0441\u0442\u0435\u043F\u0435\u043D\u0438 \u0432\u044B\u0442\u0435\u0441\u043D\u0435\u043D\u0430 \u043F\u0430\u043C\u044F\u0442\u044C\u044E \u0441\u0442\u0430\u043D\u0434\u0430\u0440\u0442\u0430 DDR3."@ru . "Con DDR-II si indica un particolare tipo di memoria SDRAM.La differenza principale tra gli standard DDR-II e DDR-I sta nella maggiore velocit\u00E0 che le memorie DDR2 possono raggiungere nel trasferire dati da e verso l'unit\u00E0 centrale di calcolo, rispetto alle DDR1. Un modulo di memoria RAM DDR2 da 1GB con relativo dissipatore"@it . "Double Data Rate 2 Synchronous Dynamic Random-Access Memory (mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona com fluxo de dados duplo tipo 2, DDR2 SDRAM) \u00E9 uma interface de mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mico s\u00EDncrono (DDR) de taxa de dados dupla (SDRAM). Ele substituiu a especifica\u00E7\u00E3o DDR SDRAM original e foi substitu\u00EDdo pelo DDR3 SDRAM (lan\u00E7ado em 2007). DDR2 DIMMs n\u00E3o s\u00E3o nem para a frente compat\u00EDvel com DDR3 e nem compat\u00EDvel com DDR."@pt . . ""@en . . . . . ""@en . . . . . . "200"^^ . . . . . . . "\u062F\u064A \u062F\u064A \u0622\u0631 2 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645"@ar . . . . "Con DDR-II si indica un particolare tipo di memoria SDRAM.La differenza principale tra gli standard DDR-II e DDR-I sta nella maggiore velocit\u00E0 che le memorie DDR2 possono raggiungere nel trasferire dati da e verso l'unit\u00E0 centrale di calcolo, rispetto alle DDR1. Un modulo di memoria RAM DDR2 da 1GB con relativo dissipatore"@it . "DDR2 SDRAM (anglicky double-data-rate 2 SDRAM) byl typ opera\u010Dn\u00ED pam\u011Bti pro po\u010D\u00EDta\u010De standardizovan\u00FD organizac\u00ED JEDEC v roce 2003. Prvn\u00ED varianty taktovan\u00E9 na 200 a 266 MHz dosahovaly kv\u016Fli vy\u0161\u0161\u00ED CAS latenci ni\u017E\u0161\u00EDch v\u00FDkon\u016F, ne\u017E p\u0159edchoz\u00ED generace DDR SDRAM. Teprve na konci roku 2004 byly na trh uvedeny moduly s ni\u017E\u0161\u00EDmi latencemi a t\u00EDm i vy\u0161\u0161\u00ED rychlost\u00ED. Nov\u011B byly DDR2 SDRAM dod\u00E1v\u00E1ny v DIMM modulech s 240 v\u00FDvody. DDR2 definuje vy\u0161\u0161\u00ED frekvence datov\u00E9 sb\u011Brnice a vy\u017Eaduje ni\u017E\u0161\u00ED p\u0159\u00EDkon pomoc\u00ED intern\u00EDch hodin b\u011B\u017E\u00EDc\u00EDch na polovi\u010Dn\u00ED frekvenci extern\u00ED datov\u00E9 sb\u011Brnice. Spole\u010Dn\u011B s DDR technologi\u00ED tak umo\u017E\u0148uj\u00ED \u010Dty\u0159i datov\u00E9 p\u0159enosy za jeden intern\u00ED takt sb\u011Brnice. DDR2 pam\u011Bti na stejn\u00E9 frekvenci jako DDR pam\u011Bti tak ve v\u00FDsledku poskytuj\u00ED ni\u017E\u0161\u00ED latenci, ne\u017E star\u0161\u00ED DDR pam\u011Bti. Pam\u011Bti pracuj\u00ED p\u0159i standardn\u00EDm nap\u011Bt\u00ED 1,8 V a\u017E po nestandardn\u00ED a rizikov\u00E9 2,4 V. Mnoho pam\u011Bt\u00ED zvl\u00E1d\u00E1 nap\u011Bt\u00ED v rozmez\u00ED 1,8\u20132,2 V, pak m\u016F\u017Ee doj\u00EDt k po\u0161kozen\u00ED. \u010Casov\u00E1n\u00ED (CAS latence) maj\u00ED podle taktovac\u00ED frekvence od CL4 po CL7 (p\u0159i dan\u00E9 frekvenci je podle \u010Dasov\u00E1n\u00ED krat\u0161\u00ED nebo del\u0161\u00ED prodleva)."@cs . "DDR2 SDRAM"@ru . "DDR2 SDRAM merupakan jenis RAM (Random Access Memory) yang banyak digunakan pada era komputer sekelas Pentium 4. DDR RAM ini memiliki satu celah dibagian kakinya dan dipasang pada slot /DDR2 yang memiliki 183 pin di motherboard. DDR2 RAM mempunyai kecepatan transfer dan menyimpan data hampir 2 kali lipat dibandingkan RAM jenis SDRAM. Kapasitas yang dimiliki RAM jenis DDR2 RAM ini dimulai dari 128 Mb hingga 1 Gb perkeping memorinya. Saat ini DDR2 telah digantikan dengan DDR3 SDRAM.Dengan pemindahan data 64 bit pada satu waktu, DDR2 SDRAM memiliki kecepatan transfer sebesar (kecepatan clock memori) \u00D7 2 (untuk pengali clock bus) \u00D7 2 (untuk penggandaan kecepatan) \u00D7 64 (jumlah bit yang dipindahkan) / 8 (jumlah bit pada setiap bita). Jadi, dengan frekuensi clock memori sebesar 100 MHz, DDR2 SDRAM memiliki kecepatan transfer maksimum 3200 MB/detik. \n* l \n* \n* s"@in . . "DDR2 \u00E9s un tipus de mem\u00F2ria RAM. Forma part de la fam\u00EDlia de tecnologies de mem\u00F2ria d'acc\u00E9s aleatori, que \u00E9s una de les moltes implementacions de la DRAM. Els m\u00F2duls DDR2 s\u00F3n capa\u00E7os de treballar amb 4 bits per cicle, \u00E9s a dir 2 d'anada i 2 de tornada en un mateix cicle millorant substancialment l'amplada de banda potencial sota la mateixa freq\u00FC\u00E8ncia d'una DDR SDRAM tradicional (si una DDR a 200 MHz reals lliurava 400 MHz nominals, la DDR2 per aquests mateixos 200 MHz reals dona 800 MHz nominals). Aquest sistema funciona a causa que dins de les mem\u00F2ries hi ha un petit buffer que \u00E9s el que guarda la informaci\u00F3 per despr\u00E9s transmetre-fora del m\u00F2dul de mem\u00F2ria, aquest buffer en el cas de la DDR convencional treballava prenent els 2 bits per transmetre'ls en 1 nom\u00E9s cicle, el que augmenta la "@ca . "DDR2 \u00E9s un tipus de mem\u00F2ria RAM. Forma part de la fam\u00EDlia de tecnologies de mem\u00F2ria d'acc\u00E9s aleatori, que \u00E9s una de les moltes implementacions de la DRAM. Els m\u00F2duls DDR2 s\u00F3n capa\u00E7os de treballar amb 4 bits per cicle, \u00E9s a dir 2 d'anada i 2 de tornada en un mateix cicle millorant substancialment l'amplada de banda potencial sota la mateixa freq\u00FC\u00E8ncia d'una DDR SDRAM tradicional (si una DDR a 200 MHz reals lliurava 400 MHz nominals, la DDR2 per aquests mateixos 200 MHz reals dona 800 MHz nominals). Aquest sistema funciona a causa que dins de les mem\u00F2ries hi ha un petit buffer que \u00E9s el que guarda la informaci\u00F3 per despr\u00E9s transmetre-fora del m\u00F2dul de mem\u00F2ria, aquest buffer en el cas de la DDR convencional treballava prenent els 2 bits per transmetre'ls en 1 nom\u00E9s cicle, el que augmenta la freq\u00FC\u00E8ncia final. En les DDR2, el buffer emmagatzema 4 bits per despr\u00E9s enviar-los, el que al seu torn redobla la freq\u00FC\u00E8ncia nominal sense necessitat d'augmentar la freq\u00FC\u00E8ncia real dels m\u00F2duls de mem\u00F2ria. A totes les mem\u00F2ries DDR haurien de venir indicada la lat\u00E8ncia o temps de resposta, indicat amb l'\u00EDndex CL (7,8,9 fins a 11). Com a refer\u00E8ncia gen\u00E8rica a un \u00EDndex CL mes baix mes r\u00E0pida es la resposta,sempre mesurada en cicles de BUS. (Aix\u00F2 implica que en temps reals (Nanosegons) l'acc\u00E9s a les dades es mes r\u00E0pid en un CL9 a 1333Mhz que en un CL11 a 1600Mhz)."@ca . . "400"^^ . . "DDR2 SDRAM (\u043E\u0442 \u0430\u043D\u0433\u043B. double-data-rate two synchronous dynamic random access memory \u2014 \u043F\u043E\u0434\u0432\u043E\u0454\u043D\u0430 \u0448\u0432\u0438\u0434\u043A\u0456\u0441\u0442\u044C \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0434\u0430\u043D\u0438\u0445 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0437 \u0434\u043E\u0432\u0456\u043B\u044C\u043D\u0438\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C) \u2014 \u0446\u0435 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0432\u0438\u043A\u043E\u0440\u0438\u0441\u0442\u043E\u0432\u0443\u0432\u0430\u043D\u043E\u0457 \u0432 \u043A\u043E\u043C\u043F'\u044E\u0442\u0435\u0440\u0430\u0445. \u042F\u043A \u0456 DDR SDRAM, DDR2 SDRAM \u0432\u0438\u043A\u043E\u0440\u0438\u0441\u0442\u043E\u0432\u0443\u0454 \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0443 \u0434\u0430\u043D\u0438\u0445 \u043F\u043E \u043E\u0431\u043E\u0445 \u0444\u0440\u043E\u043D\u0442\u0430\u0445 \u0442\u0430\u043A\u0442\u043E\u0432\u043E\u0433\u043E \u0441\u0438\u0433\u043D\u0430\u043B\u0443, \u0437\u0430 \u0440\u0430\u0445\u0443\u043D\u043E\u043A \u0447\u043E\u0433\u043E \u043F\u0440\u0438 \u0442\u0430\u043A\u0456\u0439 \u0436\u0435 \u0447\u0430\u0441\u0442\u043E\u0442\u0456 \u0448\u0438\u043D\u0438 \u043F\u0430\u043C'\u044F\u0442\u0456, \u044F\u043A \u0439 \u0443 \u0437\u0432\u0438\u0447\u0430\u0439\u043D\u043E\u0457 SDRAM, \u043C\u043E\u0436\u043D\u0430 \u0444\u0430\u043A\u0442\u0438\u0447\u043D\u043E \u043F\u043E\u0434\u0432\u043E\u0457\u0442\u0438 \u0448\u0432\u0438\u0434\u043A\u0456\u0441\u0442\u044C \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0434\u0430\u043D\u0438\u0445 (\u043D\u0430\u043F\u0440\u0438\u043A\u043B\u0430\u0434, \u043F\u0440\u0438 \u0440\u043E\u0431\u043E\u0442\u0456 DDR2 \u043D\u0430 \u0447\u0430\u0441\u0442\u043E\u0442\u0456 100 \u041C\u0413\u0426 \u0435\u0444\u0435\u043A\u0442\u0438\u0432\u043D\u0430 \u0447\u0430\u0441\u0442\u043E\u0442\u0430 \u0432\u0438\u0445\u043E\u0434\u0438\u0442\u044C 200 \u041C\u0413\u0426). \u041E\u0441\u043D\u043E\u0432\u043D\u0430 \u0432\u0456\u0434\u043C\u0456\u043D\u043D\u0456\u0441\u0442\u044C DDR2 \u0432\u0456\u0434 DDR \u2014 \u0443\u0434\u0432\u0456\u0447\u0456 \u0431\u0456\u043B\u044C\u0448\u0430 \u0447\u0430\u0441\u0442\u043E\u0442\u0430 \u0440\u043E\u0431\u043E\u0442\u0438 \u0437\u043E\u0432\u043D\u0456\u0448\u043D\u044C\u043E\u0457 \u0448\u0438\u043D\u0438, \u043F\u043E \u044F\u043A\u0456\u0439 \u0434\u0430\u043D\u0456 \u043F\u0435\u0440\u0435\u0434\u0430\u044E\u0442\u044C\u0441\u044F \u0432 \u0431\u0443\u0444\u0435\u0440 \u043C\u0456\u043A\u0440\u043E\u0441\u0445\u0435\u043C\u0438 \u043F\u0430\u043C'\u044F\u0442\u0456. \u041F\u0440\u0438 \u0446\u044C\u043E\u043C\u0443 \u0440\u043E\u0431\u043E\u0442\u0430 \u0441\u0430\u043C\u043E\u0433\u043E \u0447\u0438\u043F\u0430 \u0437\u0430\u043B\u0438\u0448\u0438\u043B\u0430\u0441\u044F \u0442\u0430\u043A\u043E\u044E \u0436, \u044F\u043A \u0456 \u0443 \u043F\u0440\u043E\u0441\u0442\u043E DDR, \u0442\u043E\u0431\u0442\u043E \u0437 \u0442\u0430\u043A\u0438\u043C\u0438 \u0436 \u0437\u0430\u0442\u0440\u0438\u043C\u043A\u0430\u043C\u0438, \u0430\u043B\u0435 \u043F\u0440\u0438 \u0431\u0456\u043B\u044C\u0448\u0456\u0439 \u0448\u0432\u0438\u0434\u043A\u043E\u0441\u0442\u0456 \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0456\u043D\u0444\u043E\u0440\u043C\u0430\u0446\u0456\u0457. \u041F\u0440\u0438 \u043F\u043E\u0440\u0456\u0432\u043D\u044F\u043D\u043D\u0456 \u0440\u043E\u0431\u043E\u0442\u0438 \u043C\u0456\u043A\u0440\u043E\u0441\u0445\u0435\u043C DDR \u0442\u0430 DDR2 \u043D\u0430 \u043E\u0434\u043D\u0430\u043A\u043E\u0432\u0456\u0439 \u0442\u0430\u043A\u0442\u043E\u0432\u0456\u0439 \u0447\u0430\u0441\u0442\u043E\u0442\u0456 DDR2 \u043C\u0430\u0442\u0438\u043C\u0435 \u0443\u0434\u0432\u0456\u0447\u0456 \u0431\u0456\u043B\u044C\u0448\u0456 \u0437\u0430\u0442\u0440\u0438\u043C\u043A\u0438 \u0439 \u0437\u0430\u0433\u0430\u043B\u044C\u043D\u0430 \u043F\u0440\u043E\u0434\u0443\u043A\u0442\u0438\u0432\u043D\u0456\u0441\u0442\u044C \u0431\u0443\u0434\u0435 \u0433\u0456\u0440\u0448\u043E\u044E."@uk . . "La DDR2 SDRAM ou DDR2 (de l'anglais Double Data Rate two Synchronous Dynamic Random Access Memory) est la seconde g\u00E9n\u00E9ration de m\u00E9moire vive dynamique de type DDR pour les ordinateurs personnels, la premi\u00E8re \u00E9tant la technologie DDR SDRAM. Ce type de m\u00E9moire informatique utilise des circuits int\u00E9gr\u00E9s. Cette technologie fait partie de la famille des m\u00E9moires vives SDRAM, qui elle-m\u00EAme est une des multiples versions des m\u00E9moires DRAM. DDR2 respecte en outre le format DIMM. Avec une fr\u00E9quence d'horloge de 100 MHz, une m\u00E9moire SDR SDRAM (commun\u00E9ment appel\u00E9e seulement \u00AB SDRAM \u00BB) transf\u00E8re les donn\u00E9es sur le front montant des impulsions d'horloge. Ce qui permet d'atteindre un d\u00E9bit de transfert de donn\u00E9es de 0,8 Gio/s. Contrairement \u00E0 la SDR-SDRAM, la DDR-SDRAM et la DDR2-SDRAM effectuent les transferts sur le front montant et le front descendant des impulsions d'horloge (une technique appel\u00E9e \u00AB dual pumping \u00BB en anglais). Le taux de transfert est doubl\u00E9, il est \u00E9quivalent \u00E0 200 MHz (et une bande passante th\u00E9orique de 1,6 Gio/s) tout en utilisant la m\u00EAme fr\u00E9quence d'horloge. La diff\u00E9rence majeure entre la DDR et la DDR2 est que la fr\u00E9quence du bus est double de celle du groupe de cellules m\u00E9moires. Quatre mots de donn\u00E9es peuvent ainsi \u00EAtre transf\u00E9r\u00E9s par cycle des cellules m\u00E9moires. \u00C0 fr\u00E9quence des cellules m\u00E9moires \u00E9gale, la DDR2 a un d\u00E9bit deux fois plus \u00E9lev\u00E9 que celui de la DDR. La fr\u00E9quence d'horloge de la m\u00E9moire DDR2 est \u00E9galement g\u00E9n\u00E9ralement plus grande gr\u00E2ce \u00E0 des am\u00E9liorations techniques au niveau de l'interface \u00E9lectrique, avec des raccordements int\u00E9gr\u00E9s, une m\u00E9moire tampon de pr\u00E9lecture, ainsi que des circuits de sortie externes \u00E0 la puce. Cependant, la DDR2 a des temps de latence plus \u00E9lev\u00E9s. L'acc\u00E8s aux puces, qui est d\u00E9compos\u00E9 en n \u00E9tapes, est plus long. En ce qui concerne la m\u00E9moire tampon de pr\u00E9lecture, sa largeur de bus est pass\u00E9e de 2 bits (pour la DDR) \u00E0 4 bits. Elle passera \u00E0 8 bits pour la DDR3. En d'autres termes, cette m\u00E9moire convient plut\u00F4t aux transferts de grandes quantit\u00E9s de donn\u00E9es, car la grande vitesse de transfert sur une \u00AB longue \u00BB p\u00E9riode minimise alors le mauvais temps de latence initial. La DDR2 poss\u00E8de un avantage majeur avec une tension d'alimentation \u00E0 1,8 volt, ce qui limite la production de chaleur par effet Joule."@fr . . . . "La DDR2 SDRAM ou DDR2 (de l'anglais Double Data Rate two Synchronous Dynamic Random Access Memory) est la seconde g\u00E9n\u00E9ration de m\u00E9moire vive dynamique de type DDR pour les ordinateurs personnels, la premi\u00E8re \u00E9tant la technologie DDR SDRAM. Ce type de m\u00E9moire informatique utilise des circuits int\u00E9gr\u00E9s. Cette technologie fait partie de la famille des m\u00E9moires vives SDRAM, qui elle-m\u00EAme est une des multiples versions des m\u00E9moires DRAM. DDR2 respecte en outre le format DIMM."@fr . . . "DDR2 SDRAM"@fr . "DDR2 SDRAM (\u0430\u043D\u0433\u043B. double-data-rate two synchronous dynamic random access memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430\u044F \u0434\u0438\u043D\u0430\u043C\u0438\u0447\u0435\u0441\u043A\u0430\u044F \u043F\u0430\u043C\u044F\u0442\u044C \u0441 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u043B\u044C\u043D\u044B\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0438 \u0443\u0434\u0432\u043E\u0435\u043D\u043D\u043E\u0439 \u0441\u043A\u043E\u0440\u043E\u0441\u0442\u044C\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0438 \u0434\u0430\u043D\u043D\u044B\u0445, \u0432\u0442\u043E\u0440\u043E\u0435 \u043F\u043E\u043A\u043E\u043B\u0435\u043D\u0438\u0435) \u2014 \u044D\u0442\u043E \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u043F\u0430\u043C\u044F\u0442\u0438, \u0438\u0441\u043F\u043E\u043B\u044C\u0437\u0443\u0435\u043C\u043E\u0439 \u0432 \u0432\u044B\u0447\u0438\u0441\u043B\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0442\u0435\u0445\u043D\u0438\u043A\u0435 \u0432 \u043A\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u0438 \u0432\u0438\u0434\u0435\u043E\u043F\u0430\u043C\u044F\u0442\u0438. \u041F\u0440\u0438\u0448\u043B\u0430 \u043D\u0430 \u0441\u043C\u0435\u043D\u0443 \u043F\u0430\u043C\u044F\u0442\u0438 DDR SDRAM. \u041F\u0430\u043C\u044F\u0442\u044C DDR2 \u0431\u044B\u043B\u0430 \u0432\u0432\u0435\u0434\u0435\u043D\u0430 \u0432\u043E \u0432\u0442\u043E\u0440\u043E\u043C \u043A\u0432\u0430\u0440\u0442\u0430\u043B\u0435 2003 \u0433\u043E\u0434\u0430, \u043A\u043E\u043D\u043A\u0443\u0440\u0435\u043D\u0442\u043E\u0441\u043F\u043E\u0441\u043E\u0431\u043D\u043E\u0439 \u0441 DDR \u0441\u0442\u0430\u043B\u0430 \u043A \u043A\u043E\u043D\u0446\u0443 2004 \u0433\u043E\u0434\u0430.\u0412 2010-\u0445 \u0431\u044B\u043B\u0430 \u0432 \u0437\u043D\u0430\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0441\u0442\u0435\u043F\u0435\u043D\u0438 \u0432\u044B\u0442\u0435\u0441\u043D\u0435\u043D\u0430 \u043F\u0430\u043C\u044F\u0442\u044C\u044E \u0441\u0442\u0430\u043D\u0434\u0430\u0440\u0442\u0430 DDR3."@ru . "DDR2 SDRAM (ang. Double Data Rate 2 Synchronous Dynamic Random Access Memory) \u2013 kolejny po DDR standard pami\u0119ci RAM typu SDRAM, stosowany w komputerach jako pami\u0119\u0107 operacyjna."@pl . . "DDR2 SDRAM (de las siglas en ingl\u00E9s Double Data Rate type two Synchronous Dynamic Random-Access Memory) es un tipo de memoria RAM, de la familia de las SDRAM usadas ya desde principios de 1970.\u200B"@es . "DDR2 SDRAM"@in . "Front and back of a 2GB PC2-5300 DDR2 RAM module for desktop PCs"@en . . . "\u7B2C\u4E8C\u4EE3\u53CC\u500D\u6570\u636E\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF08\u82F1\u8A9E\uFF1ADouble-Data-Rate Two Synchronous Dynamic Random Access Memory\uFF0C\u4E00\u822C\u7A31\u70BADDR2 SDRAM\uFF09\uFF0C\u662F\u4E00\u7A2E\u96FB\u8166\u8A18\u61B6\u9AD4\u898F\u683C\u3002\u5B83\u5C6C\u65BCSDRAM\u5BB6\u65CF\u7684\u8A18\u61B6\u9AD4\u7522\u54C1\uFF0C\u63D0\u4F9B\u76F8\u8F03\u65BCDDR SDRAM\u66F4\u9AD8\u7684\u904B\u884C\u6548\u80FD\u8207\u66F4\u4F4E\u7684\u96FB\u58D3\uFF0C\u662FDDR SDRAM\uFF08\u53CC\u500D\u6570\u636E\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF09\u7684\u5F8C\u7E7C\u8005\u3002 JEDEC\u8BBE\u7ACBDDR\u5B58\u50A8\u5668\u7684\u901F\u5EA6\u898F\u7BC4\uFF0C\u5206\u4E3A\u4E24\u4E2A\u90E8\u5206\uFF1A\u6309\u5185\u5B58\u82AF\u7247\u5206\u7C7B\u548C\u6309\u5185\u5B58\u6A21\u5757\u5206\u7C7B\u3002"@zh . . "DDR2 SDRAM (de las siglas en ingl\u00E9s Double Data Rate type two Synchronous Dynamic Random-Access Memory) es un tipo de memoria RAM, de la familia de las SDRAM usadas ya desde principios de 1970.\u200B"@es . . . "DDR2-400"@en . "DDR2 SDRAM"@ja . "Double Data Rate 2 Synchronous Dynamic Random-Access Memory (DDR2 SDRAM) is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) interface. It superseded the original DDR SDRAM specification, and was itself superseded by DDR3 SDRAM (launched in 2007). DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR."@en . . . . "DDR2 SDRAM (\u043E\u0442 \u0430\u043D\u0433\u043B. double-data-rate two synchronous dynamic random access memory \u2014 \u043F\u043E\u0434\u0432\u043E\u0454\u043D\u0430 \u0448\u0432\u0438\u0434\u043A\u0456\u0441\u0442\u044C \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0434\u0430\u043D\u0438\u0445 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0437 \u0434\u043E\u0432\u0456\u043B\u044C\u043D\u0438\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C) \u2014 \u0446\u0435 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0432\u0438\u043A\u043E\u0440\u0438\u0441\u0442\u043E\u0432\u0443\u0432\u0430\u043D\u043E\u0457 \u0432 \u043A\u043E\u043C\u043F'\u044E\u0442\u0435\u0440\u0430\u0445."@uk . . . . . "DDR2 SDRAM merupakan jenis RAM (Random Access Memory) yang banyak digunakan pada era komputer sekelas Pentium 4. DDR RAM ini memiliki satu celah dibagian kakinya dan dipasang pada slot /DDR2 yang memiliki 183 pin di motherboard. DDR2 RAM mempunyai kecepatan transfer dan menyimpan data hampir 2 kali lipat dibandingkan RAM jenis SDRAM. Kapasitas yang dimiliki RAM jenis DDR2 RAM ini dimulai dari 128 Mb hingga 1 Gb perkeping memorinya. Saat ini DDR2 telah digantikan dengan DDR3 SDRAM.Dengan pemindahan data 64 bit pada satu waktu, DDR2 SDRAM memiliki kecepatan transfer sebesar (kecepatan clock memori) \u00D7 2 (untuk pengali clock bus) \u00D7 2 (untuk penggandaan kecepatan) \u00D7 64 (jumlah bit yang dipindahkan) / 8 (jumlah bit pada setiap bita). Jadi, dengan frekuensi clock memori sebesar 100 MHz, DDR2 SDRA"@in . . . "( DDR2\uB294 \uC5EC\uAE30\uB85C \uC5F0\uACB0\uB429\uB2C8\uB2E4. \uBE44\uB514\uC624 \uAC8C\uC784\uC5D0 \uB300\uD574\uC11C\uB294 \uBB38\uC11C\uB97C \uCC38\uACE0\uD558\uC2ED\uC2DC\uC624.) \uC804\uC790 \uACF5\uD559\uC5D0\uC11C DDR2 SDRAM\uC740 \uCEF4\uD4E8\uD130\uC640 \uB2E4\uB978 \uB514\uC9C0\uD138 \uD68C\uB85C \uC7A5\uCE58\uC5D0\uC11C \uB370\uC774\uD130\uB97C \uBE60\uB974\uAC8C \uCC98\uB9AC\uD558\uB294 \uB370 \uC4F0\uC774\uB294 \uB7A8 \uAE30\uC220\uC774\uB2E4. \uC218\uB9CE\uC740 \uB514\uB7A8 \uAC00\uC6B4\uB370 \uD558\uB098\uC778 SDRAM\uACC4 \uAE30\uC220\uC758 \uC77C\uBD80\uC774\uBA70, \uC774\uC804 \uAE30\uC220\uC778 DDR SDRAM\uC5D0 \uC774\uC5B4 \uB208\uC5D0 \uB744\uAC8C \uAC1C\uC120\uB418\uC5C8\uB2E4. \uC8FC\uB41C \uC774\uC810\uC740 \uC678\uBD80 \uB370\uC774\uD130 \uBC84\uC2A4\uB97C DDR SDRAM\uC758 \uB450 \uBC30 \uB9CC\uD07C \uBE60\uB974\uAC8C \uB3D9\uC791\uD55C\uB2E4\uB294 \uAC83\uC774\uB2E4. \uC774\uB7EC\uD55C \uC774\uC810\uC740 \uAC1C\uC120\uB41C \uBC84\uC2A4 \uC2DC\uADF8\uB110\uB9C1\uC744 \uD1B5\uD574 \uC218\uD589\uB41C\uB2E4. DDR2 \uBA54\uBAA8\uB9AC\uB294 DDR \uBA54\uBAA8\uB9AC\uC640 \uAC19\uC740 \uD074\uB7ED\uC744 \uAC00\uC84C\uC73C\uBBC0\uB85C \uAC19\uC740 \uB300\uC5ED\uC744 \uC81C\uACF5\uD558\uC9C0\uB9CC \uAC00 \uAF64 \uB192\uAE30 \uB54C\uBB38\uC5D0 \uC131\uB2A5\uC774 \uB5A8\uC5B4\uC9C8 \uC218 \uC788\uB2E4."@ko . . "\u7B2C\u4E8C\u4EE3\u53CC\u500D\u6570\u636E\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF08\u82F1\u8A9E\uFF1ADouble-Data-Rate Two Synchronous Dynamic Random Access Memory\uFF0C\u4E00\u822C\u7A31\u70BADDR2 SDRAM\uFF09\uFF0C\u662F\u4E00\u7A2E\u96FB\u8166\u8A18\u61B6\u9AD4\u898F\u683C\u3002\u5B83\u5C6C\u65BCSDRAM\u5BB6\u65CF\u7684\u8A18\u61B6\u9AD4\u7522\u54C1\uFF0C\u63D0\u4F9B\u76F8\u8F03\u65BCDDR SDRAM\u66F4\u9AD8\u7684\u904B\u884C\u6548\u80FD\u8207\u66F4\u4F4E\u7684\u96FB\u58D3\uFF0C\u662FDDR SDRAM\uFF08\u53CC\u500D\u6570\u636E\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF09\u7684\u5F8C\u7E7C\u8005\u3002 JEDEC\u8BBE\u7ACBDDR\u5B58\u50A8\u5668\u7684\u901F\u5EA6\u898F\u7BC4\uFF0C\u5206\u4E3A\u4E24\u4E2A\u90E8\u5206\uFF1A\u6309\u5185\u5B58\u82AF\u7247\u5206\u7C7B\u548C\u6309\u5185\u5B58\u6A21\u5757\u5206\u7C7B\u3002"@zh . "DDR2 SDRAM"@ca . . . . . . "DDR2 SDRAM"@es . . . "DDR2"@it . "DDR2 SDRAM"@sv . ""@en . "DDR2-667"@en . "DDR2 SDRAM"@cs . . . . . "1079583861"^^ . . "DDR2"@pl . . . . . . . "3200"^^ . . "DDR2 SDRAM (ang. Double Data Rate 2 Synchronous Dynamic Random Access Memory) \u2013 kolejny po DDR standard pami\u0119ci RAM typu SDRAM, stosowany w komputerach jako pami\u0119\u0107 operacyjna."@pl . "DDR2 SDRAM"@uk . . . "DDR2-800"@en . . . . . . "JEDEC"@en . . . "(\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: DDR2 SDRAM)\u200F \u0648\u0647\u064A \u062A\u0642\u0646\u064A\u0629 \u0630\u0627\u0643\u0631\u0629 \u0648\u0644\u0648\u062C \u0639\u0634\u0648\u0627\u0626\u064A \u062A\u0633\u062A\u062E\u062F\u0645 \u0644\u0644\u062A\u062E\u0632\u064A\u0646 \u0639\u0627\u0644\u064A \u0627\u0644\u0633\u0631\u0639\u0629 \u0644\u0644\u0645\u0639\u0637\u064A\u0627\u062A \u0627\u0644\u062A\u064A \u064A\u062A\u0645 \u0627\u0644\u0639\u0645\u0644 \u0639\u0644\u064A\u0647\u0627 \u0641\u064A \u0627\u0644\u062D\u0627\u0633\u0628 \u0623\u0648 \u0627\u0644\u0623\u062C\u0647\u0632\u0629 \u0627\u0644\u0625\u0644\u0643\u062A\u0631\u0648\u0646\u064A\u0629 \u0627\u0644\u0631\u0642\u0645\u064A\u0629 \u0627\u0644\u0623\u062E\u0631\u0649. \u0648\u0647\u064A \u0646\u0648\u0639 \u0645\u0646 \u0623\u0646\u0648\u0627\u0639 \u0627\u0644\u0630\u0648\u0627\u0643\u0631 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 SDRAM \u0627\u0644\u062A\u064A \u0647\u064A \u0628\u062F\u0648\u0631\u0647\u0627 \u0646\u0648\u0639 \u0645\u0646 \u0630\u0648\u0627\u0643\u0631 \u0627\u0644\u062F\u064A \u0631\u0627\u0645 DRAM \u0648\u0647\u064A \u062A\u0639\u062A\u0628\u0631 \u0646\u0642\u0644\u0629 \u0646\u0648\u0639\u064A\u0629 \u0639\u0646 \u0633\u0627\u0628\u0642\u062A\u0647\u0627 \u062F\u064A \u062F\u064A \u0622\u0631 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 DDR SDRAM \u0625\u0646 \u0627\u064A\u062C\u0627\u0628\u064A\u062A\u0647\u0627 \u0627\u0644\u0623\u0633\u0627\u0633\u064A\u0629 \u062A\u0643\u0645\u0646 \u0641\u064A \u0625\u0645\u0643\u0627\u0646\u064A\u062A\u0647\u0627 \u0639\u0644\u0649 \u062A\u0634\u063A\u064A\u0644 \u0646\u0627\u0642\u0644\u0647\u0627 \u0623\u0633\u0631\u0639 \u0628\u0645\u0631\u062A\u064A\u0646 \u0645\u0646 \u062E\u0644\u0627\u064A\u0627\u0647\u0627 \u0627\u0644\u062F\u0627\u062E\u0644\u064A\u0629 \u0645\u0645\u0627 \u064A\u0639\u0646\u064A \u0633\u0631\u0639\u0627\u062A \u0645\u0645\u0631 \u0623\u0639\u0644\u0649 \u0648\u0637\u0627\u0642\u0629 \u0625\u0646\u062A\u0627\u062C\u064A\u0629 \u0623\u0639\u0644\u0649 \u0645\u0646 \u0633\u0627\u0628\u0642\u0627\u062A\u0647\u0627."@ar . . . "DDR2 SDRAM (Double-Data-Rate2 Synchronous Dynamic Random Access Memory) \u306F\u3001\u534A\u5C0E\u4F53\u96C6\u7A4D\u56DE\u8DEF\u3067\u69CB\u6210\u3055\u308C\u308BDRAM\u306E\u898F\u683C\u306E\u4E00\u7A2E\u3067\u3042\u308B\u3002 4\u30D3\u30C3\u30C8\u306E\u30D7\u30EA\u30D5\u30A7\u30C3\u30C1\u6A5F\u80FD\uFF08CPU\u304C\u30C7\u30FC\u30BF\u3092\u5FC5\u8981\u3068\u3059\u308B\u524D\u306B\u30E1\u30E2\u30EA\u304B\u3089\u5148\u8AAD\u307F\u3057\u3066\u53D6\u308A\u51FA\u3059\u6A5F\u80FD\uFF09\u3092\u3082\u3064\u3002\u5185\u90E8\u30AF\u30ED\u30C3\u30AF\u306E2\u500D\u306E\u5916\u90E8\u30AF\u30ED\u30C3\u30AF\u3092\u7528\u3044\u308B\u305F\u3081\u3001\u30AF\u30ED\u30C3\u30AF\u306E\u7B49\u500D\u3067\u52D5\u4F5C\u3059\u308BDDR SDRAM\u306E2\u500D\u3001SDRAM\u306E4\u500D\u306E\u30C7\u30FC\u30BF\u8EE2\u9001\u901F\u5EA6\u304C\u7406\u8AD6\u4E0A\u5F97\u3089\u308C\u308B\u3002\u30D1\u30FC\u30BD\u30CA\u30EB\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306B\u304A\u3044\u30662005\u5E74\u301C2009\u5E74\u9803\uFF08Pentium 4\u5F8C\u671F\u301CIntel Core 2\uFF09\u306E\u4E3B\u8981\u306A\u30E1\u30A4\u30F3\u30E1\u30E2\u30EA\u3068\u3057\u3066\u3001\u643A\u5E2F\u96FB\u8A71\u306B\u304A\u3044\u3066\u306F2011\u5E74\u304B\u3089\uFF08Cortex-A9\u306A\u3069\uFF09\u7528\u3044\u3089\u308C\u3066\u3044\u308B\u3002"@ja .