This HTML5 document contains 279 embedded RDF statements represented using HTML+Microdata notation.

The embedded RDF content will be recognized by any processor of HTML5 Microdata.

Namespace Prefixes

PrefixIRI
dbpedia-dehttp://de.dbpedia.org/resource/
dcthttp://purl.org/dc/terms/
yago-reshttp://yago-knowledge.org/resource/
dbohttp://dbpedia.org/ontology/
foafhttp://xmlns.com/foaf/0.1/
dbpedia-huhttp://hu.dbpedia.org/resource/
dbpedia-kohttp://ko.dbpedia.org/resource/
dbpedia-eshttp://es.dbpedia.org/resource/
n26https://global.dbpedia.org/id/
n30https://www.intel.com/content/www/us/en/support/articles/000005657/
yagohttp://dbpedia.org/class/yago/
dbpedia-ruhttp://ru.dbpedia.org/resource/
dbthttp://dbpedia.org/resource/Template:
rdfshttp://www.w3.org/2000/01/rdf-schema#
dbpedia-ethttp://et.dbpedia.org/resource/
freebasehttp://rdf.freebase.com/ns/
dbpedia-srhttp://sr.dbpedia.org/resource/
dbpedia-fahttp://fa.dbpedia.org/resource/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
owlhttp://www.w3.org/2002/07/owl#
n19http://dbpedia.org/resource/Pacific_Cyber/
n28https://web.archive.org/web/20110929024052/http:/www.kingston.com/newtech/
wikipedia-enhttp://en.wikipedia.org/wiki/
dbpedia-zhhttp://zh.dbpedia.org/resource/
dbpedia-frhttp://fr.dbpedia.org/resource/
dbphttp://dbpedia.org/property/
dbchttp://dbpedia.org/resource/Category:
provhttp://www.w3.org/ns/prov#
xsdhhttp://www.w3.org/2001/XMLSchema#
goldhttp://purl.org/linguistics/gold/
wikidatahttp://www.wikidata.org/entity/
dbrhttp://dbpedia.org/resource/
dbpedia-rohttp://ro.dbpedia.org/resource/
dbpedia-jahttp://ja.dbpedia.org/resource/
n25https://www.utmel.com/blog/categories/memory%20chip/what-is-a-memory-controller/

Statements

Subject Item
dbr:Cascade_Lake_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Puma_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:NEAT_chipset
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_address
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_controller
rdf:type
yago:ElectricalDevice103269401 yago:WikicatDigitalCircuits yago:Artifact100021939 yago:Circuit103033362 yago:PhysicalEntity100001930 dbo:BaseballLeague yago:Device103183080 yago:WikicatElectronicCircuits yago:Instrumentality103575240 yago:Whole100003553 yago:Object100002684
rdfs:label
Controlador de memoria メモリコントローラ Memory controller 메모리 컨트롤러 Contrôleur mémoire 内存控制器 Контроллер памяти Speichercontroller
rdfs:comment
메모리 컨트롤러(memory controller,MC)는 컴퓨터 주기판이나 중앙 처리 장치의 다이 위에 있는 칩이며, 메모리에서 오고가는 자료를 관리하는 데 쓰인다. 대한민국의 일부 하드웨어 관련 웹사이트나 환경에서는 '멤콘'으로 줄여 부르기도 한다. 메모리 컨트롤러는 가끔 메모리 칩 컨트롤러(memory chip controller, MCC) 또는 메모리 컨트롤러 장치(memory controller unit, MCU)로도 불린다. The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an integral part of a microprocessor; in the latter case, it is usually called an integrated memory controller (IMC). A memory controller is sometimes also called a memory chip controller (MCC) or a memory controller unit (MCU). A common form of memory controller is the memory management unit (MMU) which in many operating systems implements virtual addressing. El controlador de memoria es un circuito electrónico digital que se encarga de gestionar el flujo de datos entre el procesador y la memoria. Puede ser independiente o integrado en otro chip como en el encapsulado del procesador. Sin embargo este método de integración lastra a renovar los controladores según avanza la tecnología de las memorias. Der Speicherkontroller (auch Memory Controller) ist ein Chip, der bei Computern den Datenfluss zwischen Prozessor und Arbeitsspeicher regelt. Untergebracht ist der Speicherkontroller entweder direkt im Prozessor (Integrated Memory Controller – IMC) oder auf dem Mainboard, dort meistens in der Northbridge. Der Hersteller Intel platziert den Speicherkontroller seit der Intel Core i Serie direkt in der CPU, wie es bei AMD bereits seit Einführung der K8-Architektur der Fall ist. Auch beim IBM Power (seit der fünften Generation) und der Cell-Prozessorserie liegt der Speicherkontroller innerhalb des Prozessors. メモリコントローラ (Memory controller) とは、コンピュータシステム上でRAM(半導体メモリ)の、データの読み出し、書き出し、DRAMのリフレッシュなど、メインメモリのインタフェースを統括するLSI、または機能のこと。 それまでのメインメモリはCPUにフロントサイドバスを介して直接接続されていたが、次第に必要とされるメモリが増大し、Double-Data-Rateなどの特殊な制御を必要とするものも多くなってきたため、CPUとメモリのあいだを仲立ちするLSIに移行した。 パソコンなどのコンピュータシステムでは、この機能はチップセットに統合されているが、Athlon 64は高速化のためにメモリコントローラを内蔵している。インテル Core プロセッサー・ファミリーの途中から、時代の進歩や機能の洗練のために再び高機能化したCPUに統合される流れになっている。 Un contrôleur mémoire est un contrôleur (un circuit électronique spécialisé dans la gestion d'une composante d'un ordinateur) chargé de traduire des requêtes, en général en provenance d'un microprocesseur, de lecture ou d'écriture en mémoire, vers un protocole de mémoire particulier, comme ceux des mémoires SDRAM ou DDR SDRAM. Контроллер оперативной памяти — цифровая схема, управляющая потоками данных между вычислительной системой и оперативной памятью. Может представлять собой отдельную микросхему или быть интегрирована в более сложную микросхему, например, в состав северного моста, микропроцессор или систему на кристалле. 内存控制器(英語:Memory Controller)是一个用于管理与规划从内存到CPU间传输速度的总线电路控制器,它可以是一个单独的芯片,或集成到有关的大型芯片里;如CPU或北桥内置的内存控制器。
dct:subject
dbc:Computer_memory dbc:Integrated_circuits
dbo:wikiPageID
5288134
dbo:wikiPageRevisionID
1120876406
dbo:wikiPageWikiLink
dbr:FB-DIMM dbr:8-bit dbr:Reverse-engineering dbr:Centaur_(computing) dbr:DDR_SDRAM dbr:JEDEC dbr:AMD dbr:Main_memory dbr:DRAM_data_remanence dbr:Electric_charge dbr:Virtual_addressing dbr:Multi-channel_memory_architecture dbr:Memory_latency dbr:Memory_scrubbing dbr:Fermi_(microarchitecture) dbr:IBM dbr:Intel dbr:Die_(integrated_circuit) dbr:Error_detection_and_correction dbr:Demultiplexer dbr:Operating_system dbr:POWER8 dbr:128-bit dbr:PA-7300LC dbr:Computer_forensics dbr:Capacitors dbr:Memory_refresh dbr:UltraSPARC_T1 dbr:Address_generation_unit dbr:Microprocessors dbr:Line_capacitance dbr:Cold_boot_attack dbc:Computer_memory dbr:Pseudo-random dbr:PowerQUICC dbr:Alpha_21066 dbr:Dynamic_random_access_memory dbr:Double_data_rate dbr:Intel_Core dbr:Solid_state_drive dbr:Sun_Microsystems dbr:Advanced_Micro_Devices dbr:POWER5 dbr:NVIDIA dbr:Socket_AM2 dbr:Flash_memory dbr:Memory_management_unit dbr:ARM_architecture dbc:Integrated_circuits dbr:Microprocessor dbr:Nehalem_(microarchitecture) dbr:Multiplexer dbr:DDR2_SDRAM dbr:DIMM dbr:USB_flash_drive dbr:AMD_K8 dbr:Northbridge_(computing) dbr:64-bit dbr:L4_cache dbr:Flash_memory_controller
dbo:wikiPageExternalLink
n25: n28:MKF_520DDRwhitepaper.pdf n30:boards-and-kits.html
owl:sameAs
dbpedia-fa:کنترلگر_حافظه dbpedia-ja:メモリコントローラ dbpedia-ko:메모리_컨트롤러 dbpedia-fr:Contrôleur_mémoire dbpedia-hu:Memóriavezérlő yago-res:Memory_controller dbpedia-et:Mälukontroller dbpedia-de:Speichercontroller dbpedia-ru:Контроллер_памяти dbpedia-sr:Меморијски_контролер dbpedia-ro:Controler_de_memorie n26:DdeJ freebase:m.0dcrl3 dbpedia-zh:内存控制器 dbpedia-es:Controlador_de_memoria wikidata:Q1175867
dbp:wikiPageUsesTemplate
dbt:Citation_needed dbt:Short_description dbt:Anchor dbt:CPU_technologies dbt:Snd dbt:Reflist dbt:Main dbt:Update
dbo:abstract
メモリコントローラ (Memory controller) とは、コンピュータシステム上でRAM(半導体メモリ)の、データの読み出し、書き出し、DRAMのリフレッシュなど、メインメモリのインタフェースを統括するLSI、または機能のこと。 それまでのメインメモリはCPUにフロントサイドバスを介して直接接続されていたが、次第に必要とされるメモリが増大し、Double-Data-Rateなどの特殊な制御を必要とするものも多くなってきたため、CPUとメモリのあいだを仲立ちするLSIに移行した。 パソコンなどのコンピュータシステムでは、この機能はチップセットに統合されているが、Athlon 64は高速化のためにメモリコントローラを内蔵している。インテル Core プロセッサー・ファミリーの途中から、時代の進歩や機能の洗練のために再び高機能化したCPUに統合される流れになっている。 Контроллер оперативной памяти — цифровая схема, управляющая потоками данных между вычислительной системой и оперативной памятью. Может представлять собой отдельную микросхему или быть интегрирована в более сложную микросхему, например, в состав северного моста, микропроцессор или систему на кристалле. El controlador de memoria es un circuito electrónico digital que se encarga de gestionar el flujo de datos entre el procesador y la memoria. Puede ser independiente o integrado en otro chip como en el encapsulado del procesador. Tradicionalmente Intel ha colocado el controlador de memoria independiente, localizado en el northbridge de la placa base, aunque muchos modelos como , , AMD Athlon 64, AMD Opteron, , , y más recientemente algunos modelos de Intel Nehalem integran el controlador de memoria dentro de la misma cámara del procesador; sin embargo la tendencia es integrarlo en el mismo encapsulado del procesador. Todo ello con el objetivo de reducir la latencia y el consumo. Sin embargo este método de integración lastra a renovar los controladores según avanza la tecnología de las memorias. Realmente, el concepto de integración no es una idea nueva, varios modelos de procesadores de la década de 1990, como los y ya integraban el controlador de memoria dentro de su procesador, aunque no con el propósito de ganancia de rendimiento, sino más bien para ahorrar costes eliminando la necesidad de un chip externo. Der Speicherkontroller (auch Memory Controller) ist ein Chip, der bei Computern den Datenfluss zwischen Prozessor und Arbeitsspeicher regelt. Untergebracht ist der Speicherkontroller entweder direkt im Prozessor (Integrated Memory Controller – IMC) oder auf dem Mainboard, dort meistens in der Northbridge. Der Hersteller Intel platziert den Speicherkontroller seit der Intel Core i Serie direkt in der CPU, wie es bei AMD bereits seit Einführung der K8-Architektur der Fall ist. Auch beim IBM Power (seit der fünften Generation) und der Cell-Prozessorserie liegt der Speicherkontroller innerhalb des Prozessors. Der Vorteil einer Unterbringung des Speicherkontrollers im Prozessor liegt in den kürzeren Wegen der Zugriffe. Der Chip kann so, im Vergleich zur Unterbringung auf dem Mainboard, direkt adressiert werden – ohne den Umweg über die Northbridge. Allerdings unterstützt ein Speicherkontroller nur bestimmte Speichertypen, somit legt seine Wahl und Bauweise den Speichertyp des Systems fest. Ist der Speicherkontroller im Prozessor integriert, hängt der unterstützte Speichertyp vom Prozessor ab; ist er hingegen auf dem Mainboard integriert, ist der verwendete Speicher vom Prozessor unabhängig, lediglich das Mainboard und dessen Chipsatz bestimmen den Speichertyp. 内存控制器(英語:Memory Controller)是一个用于管理与规划从内存到CPU间传输速度的总线电路控制器,它可以是一个单独的芯片,或集成到有关的大型芯片里;如CPU或北桥内置的内存控制器。 Un contrôleur mémoire est un contrôleur (un circuit électronique spécialisé dans la gestion d'une composante d'un ordinateur) chargé de traduire des requêtes, en général en provenance d'un microprocesseur, de lecture ou d'écriture en mémoire, vers un protocole de mémoire particulier, comme ceux des mémoires SDRAM ou DDR SDRAM. The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an integral part of a microprocessor; in the latter case, it is usually called an integrated memory controller (IMC). A memory controller is sometimes also called a memory chip controller (MCC) or a memory controller unit (MCU). A common form of memory controller is the memory management unit (MMU) which in many operating systems implements virtual addressing. 메모리 컨트롤러(memory controller,MC)는 컴퓨터 주기판이나 중앙 처리 장치의 다이 위에 있는 칩이며, 메모리에서 오고가는 자료를 관리하는 데 쓰인다. 대한민국의 일부 하드웨어 관련 웹사이트나 환경에서는 '멤콘'으로 줄여 부르기도 한다. 메모리 컨트롤러는 가끔 메모리 칩 컨트롤러(memory chip controller, MCC) 또는 메모리 컨트롤러 장치(memory controller unit, MCU)로도 불린다. 인텔 프로세서 기반의 컴퓨터 대부분은 자사 메인보드의 노스브리지에 추가되어 있지만 AMD의 애슬론 64, 옵테론, IBM사의 , 그리고 썬 마이크로시스템즈사의 프로세서와 같은 현대의 마이크로프로세서는 를 줄이기 위해 CPU에 메모리 컨트롤러를 장착하고 있다. CPU에 메모리 컨트롤러를 장착할 경우 시스템 성능을 잠재적으로 향상시킬 수 있지만 프로세서가 특정한 종류의 메모리만 인식할 수 있게 제한을 받을뿐 아니라 새로운 메모리 기술을 지원하는 데 중앙 처리 장치의 칩을 다시 설계해야 하는 부담을 안겨 줄 수 있다. DDR2 SDRAM이 도입되었을 때, AMD는 새로운 애슬론 64 CPU를 출시하였다. 이 CPU 모델들은 DDR2 컨트롤러가 장착되어 있으며 소켓 AM2로 알려진 다른 물리 소켓을 사용함으로써 새로운 종류의 램을 위해 설계된 메인보드에만 장착할 수 있다. 메모리 컨트롤러가 다이 위에 없으면, 업데이트된 노스브리지와 함께 똑같은 CPU를 새로운 메인보드에 설치할 수 있다.
gold:hypernym
dbr:Circuit
prov:wasDerivedFrom
wikipedia-en:Memory_controller?oldid=1120876406&ns=0
dbo:wikiPageLength
11902
foaf:isPrimaryTopicOf
wikipedia-en:Memory_controller
Subject Item
dbr:Monokub
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Apollo_VP3
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Apple_A6X
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Arbiter_(electronics)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:History_of_general-purpose_CPUs
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Broadwell-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Cascade_Lake-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Haswell-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Ivy_Bridge-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Nehalem-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Sandy_Bridge-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Mac_models_grouped_by_CPU_type
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Pentium_D
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:DEC_7000_AXP_and_DEC_10000_AXP
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:DIMM
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Dynamic_random-access_memory
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Intel_Hub_Architecture
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Intel_QuickPath_Interconnect
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Intel_Sandy_Bridge-based_Xeon_microprocessors
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Interleaved_memory
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Power10
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Cooper_Lake_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Coreboot
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:SGI_Indigo
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Opteron
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Emotion_Engine
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:GeForce_500_series
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Multi-channel_memory_architecture
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Socket_AM1
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Apple_silicon
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Apricot_Portable
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:M-Labs
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:MIPS_architecture_processors
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Common_Firmware_Environment
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Comparison_of_CPU_microarchitectures
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Computer_engineering_compendium
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Computer_program
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Zen+
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Front-side_bus
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Fully_Buffered_DIMM
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_bank
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Microarchitecture
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Phenom_II
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Piledriver_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Transmeta
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Tremont_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:DIMM_scrambling
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:List_of_AMD_CPU_microarchitectures
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_ARM_processors
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:VAX_8000
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Alpha_21464
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:DEC_Alpha
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Alpha_21064
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Alpha_21164
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Alpha_21364
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
n19:Metrix
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Direct_memory_access
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Transmeta_Crusoe
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Ice_Lake-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Intel_Xeon_processors_(Skylake-based)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:List_of_Linux-supported_computer_architectures
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_rank
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_refresh
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Quantum_Effect_Devices
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Registered_memory
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Haswell_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Athlon
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Athlon_64
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Interrupt
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Jaguar_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:TeraScale_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Socket_AM2+
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Atari_Jaguar
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:AMD_10h
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:AMD_Accelerated_Processing_Unit
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Acer_PICA
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:LEON
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Big_memory
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Bloomfield_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Heterogeneous_computing
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Wireless_Router_Application_Platform
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:U80601
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Bus_(computing)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:PlayStation_2
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:PlayStation_4
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:PlayStation_4_technical_specifications
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Soviet_integrated_circuit_designation
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Clarkdale_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Controller_(computing)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Håkan_Lans
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Ice_Lake_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Intel_Core
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Intel_Quark
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Nehalem_(microarchitecture)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Rambus
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:ServerWorks
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Northbridge_(computing)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Southbridge_(computing)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Integrated_memory_controller
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:Memory_chip_controller
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:Memory_controller_unit
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:Memory_management_unit
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Serial_presence_detect
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Single-chip_Cloud_Computer
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Synchronous_dynamic_random-access_memory
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_scrubbing
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Zilog_Encore!_32
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:IBM_Power_microprocessors
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:IBM_z13_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:IBM_z14_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:IBM_z196
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:IBM_zEC12_(microprocessor)
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:POWER5
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Sempron
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:UltraSPARC_III
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Value_cache_encoding
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Uncore
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Tegra
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Xeon
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:OpenCores
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Socket_940
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:TILEPro64
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Transmeta_Efficeon
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:SPARC64_V
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Rambus_Inc._v._Nvidia
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Socket_754
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:UltraSPARC_T2
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:XIO
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:PA-7100LC
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:POWER1
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:PWRficient
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:UniDIMM
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:SGI_O2
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_Controller
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:Memory_scrambling
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
dbr:Sunway_SW26010
dbo:wikiPageWikiLink
dbr:Memory_controller
Subject Item
dbr:Memory_Controller_Unit
dbo:wikiPageWikiLink
dbr:Memory_controller
dbo:wikiPageRedirects
dbr:Memory_controller
Subject Item
wikipedia-en:Memory_controller
foaf:primaryTopic
dbr:Memory_controller