This HTML5 document contains 103 embedded RDF statements represented using HTML+Microdata notation.

The embedded RDF content will be recognized by any processor of HTML5 Microdata.

Namespace Prefixes

PrefixIRI
dctermshttp://purl.org/dc/terms/
yago-reshttp://yago-knowledge.org/resource/
dbohttp://dbpedia.org/ontology/
foafhttp://xmlns.com/foaf/0.1/
dbpedia-cahttp://ca.dbpedia.org/resource/
n15https://global.dbpedia.org/id/
dbthttp://dbpedia.org/resource/Template:
rdfshttp://www.w3.org/2000/01/rdf-schema#
freebasehttp://rdf.freebase.com/ns/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
owlhttp://www.w3.org/2002/07/owl#
dbpedia-frhttp://fr.dbpedia.org/resource/
wikipedia-enhttp://en.wikipedia.org/wiki/
provhttp://www.w3.org/ns/prov#
dbphttp://dbpedia.org/property/
dbchttp://dbpedia.org/resource/Category:
xsdhhttp://www.w3.org/2001/XMLSchema#
goldhttp://purl.org/linguistics/gold/
wikidatahttp://www.wikidata.org/entity/
dbrhttp://dbpedia.org/resource/

Statements

Subject Item
dbr:Ambric
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Graphcore
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Pollack's_rule
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Manycore_processor
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Tile_processor
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Discrete-event_simulation
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Kahn_process_networks
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Sunway_TaihuLight
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:MPPA
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
dbo:wikiPageDisambiguates
dbr:Massively_parallel_processor_array
Subject Item
dbr:Massively_parallel
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Massively_parallel_processor_array
rdf:type
dbo:BaseballLeague
rdfs:label
Processador MPPA Massively parallel processor array Réseau de processeurs massivement parallèles
rdfs:comment
Processador MPPA (acrònim de massively parallel processor array), en ciències de la computació, és un tipus de circuit integrat que posseeix un gran nombre (de l'ordre de centenars o milers) de CPU i memòries RAM treballant en paral·lel. El model de programari és execució en paral·lel de múltiples tasques. Un réseau de processeurs massivement parallèles (en anglais, massively parallel processor array) est un type de circuit intégré contenant des centaines ou de milliers processeurs et de mémoires vives. Les processeurs s'échangent des données à travers des interconnexions reconfigurables. En tirant parti du parallélisme, un circuit de ce type peut accomplir plus de travail qu'un circuit conventionnel. * Portail de l’informatique A massively parallel processor array, also known as a multi purpose processor array (MPPA) is a type of integrated circuit which has a massively parallel array of hundreds or thousands of CPUs and RAM memories. These processors pass work to one another through a reconfigurable interconnect of channels. By harnessing a large number of processors working in parallel, an MPPA chip can accomplish more demanding tasks than conventional chips. MPPAs are based on a software parallel programming model for developing high-performance embedded system applications.
dcterms:subject
dbc:Manycore_processors dbc:Parallel_computing
dbo:wikiPageID
17552673
dbo:wikiPageRevisionID
1123351141
dbo:wikiPageWikiLink
dbr:Array_processor dbr:ASOCS dbr:Random-access_memory dbr:Single_instruction,_multiple_data dbr:GreenArrays dbr:Shared_memory_architecture dbr:Aspex_(Ericsson) dbr:Intel dbr:Fudan_University dbr:AI_accelerator dbr:Programming_model dbr:Ambric dbr:Communicating_sequential_processes dbr:Channel_(communications) dbr:Server_(computing) dbr:Molecular_dynamics dbr:Symmetric_multiprocessing dbr:Distributed_memory dbr:Coherent_Logix dbr:IntellaSys dbr:GPGPU dbr:Central_processing_unit dbr:SW26010 dbr:Sunway_(processor) dbr:Adapteva dbr:Asynchronous_Array_of_Simple_Processors dbr:Workflow dbr:Multiple_instruction,_multiple_data dbc:Manycore_processors dbr:Reconfigurability dbr:PicoChip dbr:Video_compression dbr:Manycore_processing_unit dbr:Single_Instruction_Multiple_Threads dbr:Application-specific_integrated_circuit dbr:University_of_California,_Davis dbr:Hardware_acceleration dbr:Image_processing dbr:TaihuLight dbr:Block_diagram dbr:Manycore dbr:FPGA dbr:D._E._Shaw_Research dbr:Massively_parallel dbr:Multi-core_(computing) dbr:Kahn_process_network dbr:Software-defined_radio dbr:Model_of_computation dbr:Medical_imaging dbr:Asynchronous_array_of_simple_processors dbr:Tabula_(company) dbr:Network_processing dbr:Tilera dbc:Parallel_computing dbr:Desktop_computer dbr:Digital_signal_processor dbr:MIT dbr:Embedded_system dbr:High-performance_computing dbr:Kalray dbr:Integrated_circuit
owl:sameAs
dbpedia-fr:Réseau_de_processeurs_massivement_parallèles n15:4rLzT wikidata:Q6784813 yago-res:Massively_parallel_processor_array freebase:m.04635bb dbpedia-ca:Processador_MPPA
dbp:wikiPageUsesTemplate
dbt:Reflist
dbo:abstract
A massively parallel processor array, also known as a multi purpose processor array (MPPA) is a type of integrated circuit which has a massively parallel array of hundreds or thousands of CPUs and RAM memories. These processors pass work to one another through a reconfigurable interconnect of channels. By harnessing a large number of processors working in parallel, an MPPA chip can accomplish more demanding tasks than conventional chips. MPPAs are based on a software parallel programming model for developing high-performance embedded system applications. Un réseau de processeurs massivement parallèles (en anglais, massively parallel processor array) est un type de circuit intégré contenant des centaines ou de milliers processeurs et de mémoires vives. Les processeurs s'échangent des données à travers des interconnexions reconfigurables. En tirant parti du parallélisme, un circuit de ce type peut accomplir plus de travail qu'un circuit conventionnel. * Portail de l’informatique Processador MPPA (acrònim de massively parallel processor array), en ciències de la computació, és un tipus de circuit integrat que posseeix un gran nombre (de l'ordre de centenars o milers) de CPU i memòries RAM treballant en paral·lel. El model de programari és execució en paral·lel de múltiples tasques.
gold:hypernym
dbr:Circuit
prov:wasDerivedFrom
wikipedia-en:Massively_parallel_processor_array?oldid=1123351141&ns=0
dbo:wikiPageLength
10591
foaf:isPrimaryTopicOf
wikipedia-en:Massively_parallel_processor_array
Subject Item
dbr:Fabric_computing
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:PicoChip
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Sunway_SW26010
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
Subject Item
dbr:Massively_Parallel_Processor_Array
dbo:wikiPageWikiLink
dbr:Massively_parallel_processor_array
dbo:wikiPageRedirects
dbr:Massively_parallel_processor_array
Subject Item
wikipedia-en:Massively_parallel_processor_array
foaf:primaryTopic
dbr:Massively_parallel_processor_array