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The POWER1 is a multi-chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture (ISA). It was originally known as the RISC System/6000 CPU or, when in an abbreviated form, the RS/6000 CPU, before introduction of successors required the original name to be replaced with one that used the same naming scheme (POWERn) as its successors in order to differentiate it from the newer designs.

Attributes	Values
rdf:type	yago:Artifact100021939 yago:Chip103020034 yago:Commodity103076708 yago:Conductor103088707 yago:Device103183080 yago:Instrumentality103575240 yago:Merchandise103748886 yago:Microprocessor103760310 yago:Object100002684 yago:PhysicalEntity100001930 yago:WikicatIBMMicroprocessors yago:WikicatIBMProducts yago:SemiconductorDevice104171831 yago:Whole100003553
rdfs:label	POWER1 (es) POWER1 (fr) POWER1 (it) POWER1 (ja) POWER1 (en)
rdfs:comment	Le POWER1 est un processeur multi-puces développé et fabriqué par IBM implémentant le jeu d'instruction POWER (Performance Optimisation With Enhanced RISC). Il a été annoncé en 1990 et a été initialement utilisé dans la première gamme de machines RISC System/6000. La configuration d'origine avait une vitesse d'horloge de 25 MHz et une puissance de 50 MFLOPS. (fr) El POWER1 es una CPU multichip desarrollada y fabricada por IBM que implementó la arquitectura del conjunto de instrucciones (ISA) POWER. Originalmente se conocía como CPU RISC System/6000 o, en forma abreviada, CPU RS/6000, antes de que la introducción de los sucesores requiriera que el nombre original fuera reemplazado por uno que usó el mismo esquema de nombres (POWERn) que sus sucesores para diferenciarlo de los diseños más nuevos. (es) The POWER1 is a multi-chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture (ISA). It was originally known as the RISC System/6000 CPU or, when in an abbreviated form, the RS/6000 CPU, before introduction of successors required the original name to be replaced with one that used the same naming scheme (POWERn) as its successors in order to differentiate it from the newer designs. (en) Il POWER1 era un processore RISC a 32 bit prodotto da IBM. Fu il primo processore ad implementare l'instruction set POWER e venne presentato nel 1990 come CPU della linea RISC System/6000, in seguito rinominata RS/6000. Inizialmente il processore era chiamato RIOS o RIOS I. (it) POWER1（パワーワン）は、IBMが設計・製造した、POWER命令セットアーキテクチャを最初に持った、マルチチップのマイクロプロセッサである。POWER1は1990年に登場した。POWER1+（パワーワンプラス）とPOWER1++は改良版、RSCはシングルチップの派生製品、更にPowerPC 601はRSCの派生製品である。1993年には後継のPOWER2に置き換えられた。 (ja)
name	POWER1 (en)
foaf:depiction
dcterms:subject	IBM microprocessors 32-bit microprocessors Superscalar microprocessors
Wikipage page ID	1199734 (xsd:integer)
Wikipage revision ID	1097019669 (xsd:integer)
Link from a Wikipage to another Wikipage	PowerPC Power ISA Memory controller Register renaming Integrated circuit Power10 SIMD Out-of-order execution Endianness Fused multiply–add GNU Compiler Collection Branch (computer science) Branch predictor POWER8 Arithmetic logic unit Function (computer programming) Clock rate Pin grid array Pipeline (computing) Program counter Translation lookaside buffer CPU cache Address space Watt 32-bit Dynamic random access memory IBM microprocessors Central processing unit Direct memory access Semiconductor device fabrication Mainframe computer RISC Single Chip Harvard architecture Interrupt 32-bit microprocessors Superscalar microprocessors Transistor Digital signal processor Bus (computing) CMOS IBM POWER Instruction Set Architecture IBM IBM ROMP IBM Scalable POWERparallel Instruction set Micro Channel architecture Optical fiber RAM Workstations Electronics manufacturing services MHz Multiprocessing Memory scrubbing Serial communication Host (network) Single precision POWER7 POWER5 Gigabyte PowerPC 600 RS/6000 POWER2 POWER3 POWER4 POWER6

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