MIPS architecture
label: MIPS架構 @zh
label: معمارية ميبس @ar
label: MIPS (architektura) @cs
label: Architecture MIPS @fr
label: Arquitetura MIPS @pt
label: MIPS (CPU) @nl
label: Architektura MIPS @pl
label: MIPS-Architektur @de
label: MIPSアーキテクチャ @ja
label: Architettura MIPS @it
label: MIPS (procesador) @es
label: MIPS 아키텍처 @ko
label: Arsitektur MIPS @in
label: MIPS (processorarkitektur) @sv
label: MIPS (архитектура) @ru
label: Arquitectura MIPS @ca
label: MIPS @uk
name: MIPS
description: seni bina set arahan @ms
description: CPU @nl
description: processorarkitektur @da
description: 指令集架構 @zh
description: عمارة مجموعة التعليمات @ar
description: arsitektur set instruksi @in
description: Prozessorarchitektur @de
description: architittura d'istruzzioni pi' prucissura @scn
description: instruction set architecture
description: arquitectura de joc d’instruccions @ca
description: система команд @ru
description: 米国のMIPS社が開発した、RISCプロセッサの命令セットアーキテクチャ @ja
description: Arquitetura de microprocessadores @pt
description: komut kümesi türü bir mikroişlemci mimarisi @tr
description: 밉스 테크놀로지에서 개발한 RISC ISA @ko
description: arquiteutura de conxuntu d’instrucciones @ast
description: arquitectura de procesador @es
description: architektura komputerowa @pl
description: architecture de processeur @fr
description: architettura informatica per microprocessori RISC sviluppata dalla MIPS Computer Systems Inc. @it
subject: Category:MIPS architecture
subject: Category:Computer-related introductions in 1985
subject: Category:MIPS Technologies
subject: Category:Advanced RISC Computing
branching: Compare and branch, with a 1 instruction delay after the branching condition check
encoding: Fixed
endianness: Endianness
gpr: 32
extensions: MDMX
extensions: MIPS-3D
bits: 64
fpr: 32
page size: 4
date: 2022-08-20
date: 2022-04-07
date: 2022-03-05
date: 2022-07-26
date: 2022-05-11
design: Reduced instruction set computer
designer: Imagination Technologies
designer: MIPS Technologies
open: 6.31152E8
title: MIPS Architecture history diagram
type: Load–store architecture
url: https://web.archive.org/web/20130530213243/http:/meld.org/library/education/mips-architectures
url: https://web.archive.org/web/20220726002649/https:/wepsim.github.io/wepsim/ws_dist/%3Fmode=ep&examples_set=Default-MIPS&example=0&simulator=microcode:control_memory&notify=false
url: https://web.archive.org/web/20220726002658/https:/wepsim.github.io/wepsim/ws_dist/wepsim-classic.html%3Fmode=ep&examples_set=Default-MIPS&example=18&simulator=assembly:registers&notify=false
url: https://web.archive.org/web/20220726002658/https:/wepsim.github.io/wepsim/ws_dist/wepsim-classic.html%3Fmode=ep&examples_set=Default-MIPS&example=9&simulator=assembly:registers&notify=false
url: https://web.archive.org/web/20220820181837/https:/wepsim.github.io/wepsim/ws_dist/wepsim-classic.html%3Fmode=ep&examples_set=Default-MIPS&example=8&simulator=assembly:registers&notify=false
url: https://web.archive.org/web/20220305210932/https:/rivoire.cs.sonoma.edu/cs351/wemips/
url: https://web.archive.org/web/20220407105219/https:/web.cse.ohio-state.edu/~crawfis.3/cse675-02/Slides/MIPS%20Instruction%20Set.pdf
url: https://web.archive.org/web/20220511035335/https:/www.mips.com/products/
version: MIPS32/64 Release 6